HWF1686YC
L-Band Power FET Via Hole Chip
Autumn 2002 V1
Features
Output Power:
P
1dB
=30dBm(typ.)
High Gain:
G
L
=16dB(typ.)
High Efficiency:
PAE=45%(typ.)
High Linearity:
IP
3
=45dBm(typ.)
Outline Dimensions
650
Description
Designed for various RF and Microwave
applications,
the
HWF1686YC
is
a
medium power GaAs MESFET chip with 2
mm gate width and 0.7
碌m
gate length.
Unit :
m
Thickness: 53 5
All Bond Pads:
60 x 60
鹵
Absolute Maximum Ratings
V
DS
V
GS
I
D
I
G
T
CH
T
STG
P
T
*
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Gate Current
Channel Temperature
Storage Temperature
Power Dissipation
+15V
-5V
I
DSS
2mA
175
擄
C
-65 to +175
擄
C
5.4W
0 .0
0 .0
5 8 .5
* mounted on an infinite heat sink
Electrical Specifications
(T
A
=25
擄
C)
Symbol
I
DSS
V
P
Parameters
Saturated Drain Current
Pinch-off Voltage
Transconductance
Thermal Resistance
Output Power @1dB Gain
Linear Power Gain
Power-added Efficiency (P
out
= P
1dB
)
Third-order Intercept Point
*
V
DS
=3V, V
GS
=0V
V
DS
=3V, I
DS
=20mA
V
DS
=3V, I
DS
=200mA
Channel to Case
V
DS
=10V
I
DS
=0.5I
DSS
f=2.4GHz
g
m
R
th
P
1dB
G
L
PAE
IP
3
*: Single carrier level 15dBm, 1 MHz apart between 2 tones, current adjusted for best IP
3
Bonding Manner
Gate, drain, pad: 1 wire on each pad
Source pad: 2 wires on each side
Hexawave Inc. 2 Prosperity Road II, Science Park, Hsinchu, Taiwan, R.O.C.. TEL 886-3-578-5100 FAX 886-3-577-0512
http://www.hw.com.tw
Email:
sales@hw.com.tw
All specifications are subject to change without notice.
渭
S o u rce
435
1
3
215
2
4
S o u rce
3 4 4 .5
400
Bond Pads:
1 to 2: Gate
3 to 4: Drain
Source electrodes are connected
to the bottom of the chip by
via-holes
Conditions
Units
mA
V
mS
擄
C/W
dBm
dB
%
dBm
Min.
300
-3.5
-
-
29.0
15
-
-
Typ.
400
-2.0
200
20
30.0
16
45
45
Max.
600
-1.5
-
28
-
-
-
-
1
2
3
