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HT9480 Datasheet

  • HT9480

  • Pager Controller

  • 1540.39KB

  • 57頁

  • HOLTEK

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HT9480
Pager Controller
Features
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Operating voltage: 2.2V~3.5V
Low power crystal oscillator control
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512, 1200, or 2400 bps data rate operation
Decodes CCIR Radio-paging Code
No.1 (POCSAG Code)
2-bit random and optional 4-bit burst error
correction
Improved synchronization algorithm
Supports up to 6 independently program-
mable user addresses and 6 user frames
Three RF power on timing control pins
Single crystal for all available baud rate
(76.8kHz crystal)
Battery low indication (external detector)
Battery fail interrupt and data ready
interrupt
8K
脳
16 program ROM
416
脳
8 data RAM
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35
脳
4 LCD display
7 input lines and 10 bidirectional I/O lines
8-bit programmable timer for RTC
interrupt
8-bit programmable timer/event counter
and overflow interrupt
8-bit programmable tone generator with
buzzer output
Watchdog timer
Halt function and wake-up feature reduce
power consumption
63 powerful instructions, most instructions
in one machine cycle
Eight-level subroutine nesting
Table read instruction
Inverted or non-inverted input signal
selection for decoder input
80-pin LQFP package
General Description
The HT9480 is a high performance pager con-
troller. The built-in single cycle instructions
(16-bit wide) and two-stage pipeline architec-
ture of the HT9480 account for its high perform-
ance. The controller contains a full function
pager decoder (POCSAG code) at 512, 1200, or
2400 bits per second data rate and an LCD
display driver with a 35
脳
4 dot output.
1
23th Feb 鈥?8

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