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HT82V842 Datasheet

  • HT82V842

  • CCD CDS/PGA/10b-20M-ADC

  • 18頁(yè)

  • HOLTEK

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HT82V842
CCD CDS/PGA/10b-20M-ADC
Features
路
Operating voltage: 2.7V~3.6V
路
Low power consumption: 70mW (Typ.)
路
Power down mode: less than 30mW
路
Accepts a direct signal input to ADC or PGA at 1.0
路
Independent ADC input conversion clock and data
output clock
路
Independent CDS and PGA gain control
-
CDS:
-1.94/0/6/12dB
-
PGA: 0~24dB
路
Wide gain range:
-1.94~36dB
路
High speed sample and hold circuit: pulse width 11ns
V
PP
(Typ.)
路
CCD signal input level: 1.1 V
P-P
(Max.)
路
10-bit ADC (up to 20MHz)
路
Black level neutralizer, target setting: 16~127LSB
路
Built-in serial interface
-
DNL:
鹵0.6
LSB (Typ.)
(Min.)
路
48-pin LQFP package
General Description
The HT82V842 is a CMOS single-chip signal process-
ing device for CCD area sensors. It consists of a clamp
circuit, Correlated Double Sampler (CDS), Programma-
ble Gain Amplifier (PGA), reference voltage generator,
black level detection circuit, 20MHz 10-bit A/D converter
(ADC), timing generator for internally required pulses,
serial interface for internal function control and PGA
gain control.
Block Diagram
O B P C C D C L P A D C L P
A D C K
B L K
C L P C A P
C S S C K S D A T A
M O N O U T
T im in g
G e n e ra to r
S e r ia l
R e g is te r
B a n d G a p
C ir c u it
V R P
V C O M
V R N
D C C la m p
C C D C L P
R E F IN
C C D IN
C C D
A D IN
O B C A P
O B P
D A C
C o m p a re
B la c k L e v e l
R e g is te r
A D C L P
C D S
P G A
R o u g h
P G A
F in e
0 ~ 6 d B
(0 .0 4 7 d B /S te p )
1 0 - B it
A D C
D O 0 ~ D O 9
S /H
-1 .9 4 /0 /6 /1 2 d B
0 /6 /1 2 /1 8 d B
V
D D
V
S S
R E S E T S T B Y S H R S H D
O U T C K
Rev. 1.00
1
July 15, 2004

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