HT82V26
16-Bit CCD/CIS Analog Signal Processor
Features
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Operating voltage: 5V
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Low power consumption at 400mW (Typ.)
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Power-down mode: Under 2mA (Typ.)
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16-bit 30 MSPS A/D converter
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Guaranteed won壟t miss codes
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1~6 programmable gain
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Correlated Double Sampling
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鹵250mV
programmable offset
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Input clamp circuitry
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Internal voltage reference
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Multiplexed byte-wide output (8+8 format)
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Programmable 3-wire serial interface
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3V/5V digital I/O compatibility
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3-channel operation up to 30 MSPS
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2-channel (Even-Odd) operation up to 30 MSPS
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1-channel operation up to 25 MSPS
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28-pin SSOP/SOP package (lead-free on request)
Applications
Flatbed document scanners
Film scanners
Digital color copiers
Multifunction peripherals
General Description
The HT82V26 is a complete analog signal processor for
CCD imaging applications. It features a 3-channel archi-
tecture designed to sample and condition the outputs of
tri-linear color CCD arrays. Each channel consists of an
input clamp, Correlated Double Sampler (CDS), offset
DAC and Programmable Gain Amplifier (PGA), and a
high performance 16-bit A/D converter.
The CDS amplifiers may be disabled for use with sen-
sors such as Contact Image Sensors (CIS) and CMOS
active pixel sensors, which do not require CDS.
The 16-bit digital output is multiplexed into an 8-bit out-
put word that is accessed using two read cycles. The in-
ternal registers are programmed through a 3-wire serial
interface, which provides gain, offset and operating
mode adjustments.
The HT82V26 operates from a single 5V power supply,
typically consumes 400mW of power.
Block Diagram
A V D D
A V S S
R E F T
R E F B
A V D D
A V S S
D R V D D
D R V S S
V IN R
C D S
+
9 - B it
D A C
P G A
B A N D G A P
R e fe re n c e
P G A
3 .1
M U X
1 6 - B it
A D C
C o n fig u r a tio n
R e g is te r
M U X
R e g is te r
6
R E D
G R E E N
B L U E
D ig ita l
C o n tro l
In te rfa c e
1 6
1 6 :8
M U X
8
O E
V IN G
C D S
+
9 - B it
D A C
D O U T
V IN B
C D S
+
9 - B it
D A C
9
P G A
O F F S E T
In p u t
C la m p
B ia s
G a in
R e g is te r s
S C L K
S L O A D
S D A T A
R E D
G R E E N
B L U E
O ffs e t
R e g is te r s
A D C C L K
C D S C L K 1
C D S C L K 2
Rev. 1.50
1
June 24, 2004