Operation: 25mA Max. (V
10mA Max. (V
鈥?/div>
Standby: 30
碌
A Max. (V
CC
=5V)
10
碌
A Max. (V
CC
=3V)
Access time:150ns Max. (V
CC
=5V)
250ns Max. (V
CC
=3V)
65536
脳
8 bits of mask ROM
Mask options: chip enable CE/CE/OE1/OE1
and output enable OE/OE/NC
TTL compatible inputs and outputs
Tristate outputs
Fully static operation
Package type: 28-pin DIP/SOP
General Description
The HT23C512 is a read-only memory with high
performance CMOS storage device whose 512K
of memory is arranged into 65536 words by 8
bits.
For application flexibility, the chip enable and
output enable control pins can be selected as
active high or active low. This flexibility not only
allows easy interface with most microproces-
sors, but also eliminates bus contention in mul-
tiple bus microprocessor systems. An additional
feature of the HT23C512 is its ability to enter
the standby mode whenever the chip enable
(CE/CE) is inactive, thus reducing current con-
sumption to below 30
碌
A. The combination of
these functions makes the chip suitable for high
density low power memory applications.
Block Diagram
1
24th Aug 鈥?8