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HSP50415VI Datasheet

  • HSP50415VI

  • Wideband Programmable Modulator (WPM)

  • 29頁(yè)

  • INTERSIL   INTERSIL

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HSP50415
TM
Data Sheet
March 2000
File Number
4559.5
Wideband Programmable Modulator
(WPM)
The HSP50415 Wideband Programmable Modulator (WPM)
is a quadrature amplitude modulator/upconverter designed
for wideband digital modulation. The WPM combines
shaping and interpolation 鏗乴ters, a complex modulator, timing
and carrier NCOs and dual DACs into a single package.
The HSP50415 supports vector modulation, accepting up to
16-bit In phase (I) and Quadrature (Q) samples to generate
virtually any quadrature AM or PM modulation format. A
constellation mapper and 24 Symbol span interpolation
shaping filter is provided for the input baseband signals. Gain
adjustment is provided after the shaping FIR filter. A timing
error generator in the input section allows the on-chip timing
NCO to track the input timing.
The WPM includes a Numerically Controlled Oscillator
(NCO) driven interpolation 鏗乴ter, which allows the input and
output sample rate to have a non-integer or variable
relationship. This re-sampling feature simpli鏗乪s use of
sample rates that do not have harmonic or integer frequency
relationships to the input data rate and decouples the carrier
from the DATACLK.
A complex quadrature modulator modulates the baseband
data on a programmable carrier center frequency. The
WPM offers digital output spurious Free Dynamic Range
(SFDR) that exceeds 70dB at the maximum output sample
rate of 100MSPS, for input sample rates as high as
25MSPS. X/SIN(X) rolloff compensation filtering is
provided. Real 14-bit digital output data is available prior to
the 12-bit DACs providing 20mA full scale output current.
Features
鈥?Output Sample Rates . . . . . . . . . . . . . . . . . . to 100MSPS
鈥?Input Data Rates . . . . . . . . . . . . . . . . Up to 25MSPS (I/Q)
鈥?32-Bit Programmable Carrier NCO
鈥?X/SIN(X) Rolloff Compensation
鈥?Programmable I and Q Shaping FIR Filters:
- Up to 24 Symbol Span
鈥?Fixed or NCO Controlled Interpolation:
- Interpolation Range . . . . . . . . . . . . . . . . . . 4 to > 128K
- Digital PLL to Lock to Input Symbol Clock
鈥?Digital Signal Processing Capable of >70dB SFDR
鈥?Dual 12-bit D/A Processing Capable of >50 dB SFDR
Applications
鈥?Wide-Band Digital Modulation
鈥?Base Station Modulators
鈥?HSP50415EVAL1 Evaluation Board Available
Ordering Information
PART
NUMBER
HSP50415VI
TEMP
RANGE (
o
C)
-40 to 85
PACKAGE
100 Ld MQFP
PKG. NO
Q100.14x20
HSP50415EVAL1 Evaluation CCA, Development S/W, and User鈥檚
Manual
Block Diagram
W/R
CONTROL
碌P
INTERFACE
CARRIER
NCO
COS
SIN
X
SIN(X)
14
/
12-BIT
DAC
DIGITAL OUT
I OUT
DATA
DATA
INTERFACE/
FIFO
I
CONST
MAP
SHAPING/
INTERPOLATION
FILTERS
COMPLEX
MIXER
DATACLK
Q
SHAPING/
INTERPOLATION
FILTERS
X
SIN(X)
12-BIT
DAC
Q OUT
2XSYMCLK
REFCLK
SYMBOL NCO/
DIGITAL PLL
CLK MULTIPLIER
ANALOG PLL
CLK
4-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright
漏
Intersil Corporation 2000

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