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HSP50110JC-52 Datasheet

  • HSP50110JC-52

  • Digital Quadrature Tuner

  • 202.16KB

  • 24頁

  • INTERSIL   INTERSIL

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HSP50110
Data Sheet
January 1999
File Number
3651.4
Digital Quadrature Tuner
The Digital Quadrature Tuner (DQT) provides many of the
functions required for digital demodulation. These functions
include carrier LO generation and mixing, baseband
sampling, programmable bandwidth 鏗乴tering, baseband AGC,
and IF AGC error detection. Serial control inputs are provided
which can be used to interface with external symbol and
carrier tracking loops. These elements make the DQT ideal
for demodulator applications with multiple operational modes
or data rates. The DQT may be used with HSP50210 Digital
Costas Loop to function as a demodulator for BPSK, QPSK,
8-PSK OQPSK, FSK, FM, and AM signals.
The DQT processes a real or complex input digitized at rates
up to 52 MSPS. The channel of interest is shifted to DC by a
complex multiplication with the internal LO. The quadrature
LO is generated by a numerically controlled oscillator (NCO)
with a tuning resolution of 0.012Hz at a 52MHz sample rate.
The output of the complex multiplier is gain corrected and fed
into identical low pass FIR 鏗乴ters. Each 鏗乴ter is comprised of a
decimating low pass 鏗乴ter followed by an optional
compensation 鏗乴ter. The decimating low pass 鏗乴ter is a 3
stage Cascaded-Integrator-Comb (CIC) 鏗乴ter. The CIC 鏗乴ter
can be con鏗乬ured as an integrate and dump 鏗乴ter or a third
order CIC 鏗乴ter with a (sin(X)/X)
3
response. Compensation
鏗乴ters are provided to 鏗俛tten the (sin(X)/X)
N
response of the
CIC. If none of the 鏗乴tering options are desired, they may be
bypassed. The 鏗乴ter bandwidth is set by the decimation rate of
the CIC 鏗乴ter. The decimation rate may be 鏗亁ed or adjusted
dynamically by a symbol tracking loop to synchronize the
output samples to symbol boundaries. The decimation rate
may range from 1-4096. An internal AGC loop is provided to
maintain the output magnitude at a desired level. Also, an
input level detector can be used to supply error signal for an
external IF AGC loop closed around the A/D.
The DQT output is provided in either serial or parallel formats
to support interfacing with a variety DSP processors or digital
filter components. This device is configurable over a general
purpose 8-bit parallel bidirectional microprocessor control bus.
Features
鈥?Input Sample Rates to 52 MSPS
鈥?Internal AGC Loop for Output Level Stability
鈥?Parallel or Serial Output Data Formats
鈥?10-Bit Real or Complex Inputs
鈥?Bidirectional 8-Bit Microprocessor Interface
鈥?Frequency Selectivity <0.013Hz
鈥?Low Pass Filter Con鏗乬urable as Three Stage Cascaded-
Integrator-Comb (CIC), Integrate and Dump, or Bypass
鈥?Fixed Decimation from 1-4096, or Adjusted by NCO
Synchronization with Baseband Waveforms
鈥?Input Level Detection for External IF AGC Loop
鈥?Designed to Operate with HSP50210 Digital Costas Loop
鈥?84 Lead PLCC
Applications
鈥?Satellite Receivers and Modems
鈥?Complex Upconversion/Modulation
鈥?Tuner for Digital Demodulators
鈥?Digital PLL鈥檚
鈥?Related Products: HSP50210 Digital Costas Loop;
A/D Products HI5703, HI5746, HI5766
鈥?HSP50110/210EVAL Digital Demod Evaluation Board
Ordering Information
PART NUMBER
HSP50110JC-52
HSP50110JI-52
TEMP.
RANGE (
o
C)
0 to 70
-40 to 85
PACKAGE
84 Ld PLCC
84 Ld PLCC
PKG. NO.
N84.1.15
N84.1.15
Block Diagram
COMPLEX
MULTIPLIER
10
90
o
0
o
NCO
LOW PASS FIR
FILTER
GCA
IF AGC
CONTROL
CONTROL/STATUS
BUS
LEVEL
DETECT
8
PROGRAMMABLE
CONTROL
INTERFACE
DUMP
RE-SAMPLING
NCO
10
Q DATA
SAMPLE STROBE
SAMPLE RATE
CONTROL
CARRIER
TRACKING CONTROL
LOOP
FILTER
LOW PASS FIR
FILTER
LEVEL
DETECT
10
I DATA
GCA
REAL OR COMPLEX
INPUT DATA
10
3-229
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
漏
Intersil Corporation 1999

HSP50110JC-52 產(chǎn)品屬性

  • 0現(xiàn)貨

  • 停產(chǎn)

  • HSP50110

  • 袋

  • 停產(chǎn)

  • -

  • -

  • -

  • -

  • 表面貼裝型

  • 84-LCC（J 形引線）

  • 84-PLCC（29.31x29.31）

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