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HSP45314VI Datasheet

  • HSP45314VI

  • CommLinkTM Direct Digital Synthesizer

  • 121.27KB

  • 14頁

  • INTERSIL   INTERSIL

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HSP45314
TM
Data Sheet
May 2000
File Number
4820.2
CommLink
TM
Direct Digital Synthesizer
The 14-bit HSP45314 provides a complete Direct Digital
Synthesizer (DDS) system in a single 48-pin LQFP package.
A 48-bit Programmable Carrier NCO (numerically controlled
oscillator) and a high speed 14-bit DAC (digital to analog
converter) are integrated into a stand alone DDS.
The DDS accepts 48-bit center and offset frequency control
information via a parallel processor interface. Modulation
control is provided by 3 external pins. The PH0 and PH1 pins
select phase offsets of 0, 90, 180 and 270 degrees, while the
ENOFR pin enables or zeros the offset frequency word to
the phase accumulator.
The parallel processor interface has an 8-bit write-only data
input C(7:0), a 4-bit address A(3:0) bus, a Write Strobe
(WR), and a Write Enable (WE). The processor can update
all registers simultaneously by loading a set of master
registers, then transfer all master registers to the slave
registers by asserting the UPDATE pin.
Features
鈥?125MSPS Output Sample Rate with 5V Digital Supply
鈥?100MSPS Output Sample Rate with 3.3V Digital Supply
鈥?14-bit DAC with Internal Reference
鈥?Parallel Control Interface for Fast Tuning (50MSPS Control
Register Write Rate)
鈥?48-bit Programmable Frequency Control
鈥?Small 48-pin LQFP package
Applications
鈥?Programmable Local Oscillator
鈥?FSK Modulation
鈥?Direct Digital Synthesis
鈥?Clock Generation
Ordering Information
PART
NUMBER
HSP45314VI
TEMP. RANGE
(
o
C)
-40 to 85
PACKAGE
48 LQFP
PKG. NO.
Q48.7X7A
Block Diagram
COMPOUT
C(7:0)
A(3:0)
WR
WE
UPDATE
Pinout
C3
C4
C5
C6
C7
DVDD
WR
DGND
WE
NC
A0
A1
48 47 46 45 44 43 42 41 40 39 38 37
36
35
2
34
3
33
4
32
5
31
6
HSP45314
30
7
29
8
28
9
27
10
26
11
25
12
13 14 15 16 17 18 19 20 21 22 23 24
1
-
+
IN-
IN+
COMP1
COMP2
MASTER
MODULATION
CONTROL
SLAVE
PHASE
ACCUM.
48-PIN LQFP (Q48.7X7A
TOP VIEW
鈭?/div>
SINE
WAVE
ROM
ENOFR
PH(1:0)
14 BIT
DAC
INT
REF
IOUTA
IOUTB
REFIO
REFLO
RESET
CLK
C2
C1
C0
ENOFR
DGND
CLK
DVDD
RESET
UPDATE
COMPOUT
REFLO
REFIO
A2
A3
PH0
PH1
DGND
DVDD
DGND
DGND
DGND
DGND
DVDD
DGND
3-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright
漏
Intersil Corporation 2000
CommLink鈩?is a trademark of Intersil Corporation.
FSADJ
COMP1
AGND
AGND
IOUTB
IOUTA
COMP2
AVDD
AGND
IN+
IN-
AGND

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