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HSP45240JC-33 Datasheet

  • HSP45240JC-33

  • 13頁

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TM
HSP45240
Address Sequencer
Description
The Intersil HSP45240 is a high speed Address Sequencer
which provides specialized addressing for functions like
FFTs, 1-D and 2-D filtering, matrix operations, and image
manipulation. The sequencer supports block oriented
addressing of large data sets up to 24-bits at clock speeds
up to 50MHz.
Specialized addressing requirements are met by using the
onboard 24 x 24 crosspoint switch. This feature allows the map-
ping of the 24 address bits at the output of the address genera-
tor to the 24 address outputs of the chip. As a result, bit reverse
addressing, such as that used in FFTs, is made possible.
A single chip solution to read/write addressing is also made
possible by configuring the HSP45240 as two 12-bit
sequencers. To compensate for system pipeline delay, a pro-
grammable delay is provided on 12 of the address outputs.
The HSP45240 is manufactured using an advanced CMOS
process, and is a low power fully static design. The configu-
ration of the device is controlled through a standard micro-
processor interface and all inputs/outputs, with the exception
of clock, are TTL compatible.
September 1997
Features
鈥?Block Oriented 24-Bit Sequencer
鈥?Configurable as Two Independent 12-Bit Sequencers
鈥?24 x 24 Crosspoint Switch
鈥?Programmable Delay on 12 Outputs
鈥?Multi-Chip Synchronization Signals
鈥?Standard
碌P
Interface
鈥?100pF Drive on Outputs
鈥?DC to 50MHz Clock Rate
Applications
鈥?1-D, 2-D Filtering
鈥?Pan/Zoom Addressing
鈥?FFT Processing
鈥?Matrix Math Operations
Ordering Information
PART NUMBER
HSP45240JC-33
HSP45240JC-40
HSP45240JC-50
HSP45240GC-33
HSP45240GC-40
HSP45240GC-50
TEMP.
RANGE (
o
C)
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
PACKAGE
68 Ld PLCC
68 Ld PLCC
68 Ld PLCC
68 Ld PGA
68 Ld PGA
68 Ld PGA
PKG.
NO.
N68.95
N68.95
N68.95
G68.A
G68.A
G68.A
Block Diagram
STARTOUT
ADDVAL
DONE
BLOCKDONE
12
REG
STARTIN
START
CIRCUITRY
SEQUENCE
GENERATOR
24
CROSSPOINT
SWITCH
OUT12-23
OEH
12
DELAY
1-8
OUT0-11
OEL
PROCESSOR INTERFACE
BUSY
DLYBLK
D0-6, CS, A0, WR
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright 漏 Intersil Americas Inc. 2002. All Rights Reserved
1
File Number
2489.3

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