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HS9-80C86RH/PROTO Datasheet

  • HS9-80C86RH/PROTO

  • Microprocessor

  • 321.78KB

  • 29頁

  • ETC

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HS-80C86RH
TM
Data Sheet
August 2000
File Number
3035.2
Radiation Hardened 16-Bit CMOS
Microprocessor
The Intersil HS-80C86RH high performance radiation
hardened 16-bit CMOS CPU is manufactured using a
hardened 鏗乪ld, self aligned silicon gate CMOS process. Two
modes of operation, MINimum for small systems and
MAXimum for larger applications such as multiprocessing,
allow user con鏗乬uration to achieve the highest performance
level. Industry standard operation allows use of existing
NMOS 8086 hardware and software designs.
Speci鏗乧ations for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Speci鏗乧ations for these devices are
contained in SMD 5962-95722. A 鈥渉ot-link鈥?is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Features
鈥?Electrically Screened to SMD # 5962-95722
鈥?QML Quali鏗乪d per MIL-PRF-38535 Requirements
鈥?Radiation Performance
- Latch Up Free EPl-CMOS
- Total Dose. . . . . . . . . . . . . . . . . . . . . 100 krad(Si) (Max)
- Transient Upset . . . . . . . . . . . . . . . . . . . . >10
8
rad(Si)/s
鈥?Low Power Operation
- ICCSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . 500碌A(chǔ) (Max)
- ICCOP . . . . . . . . . . . . . . . . . . . . . . . 12mA/MHz (Max)
鈥?Pin Compatible with NMOS 8086 and Intersil 80C86
鈥?Completely Static Design DC to 5MHz
鈥?1MB Direct Memory Addressing Capability
鈥?24 Operand Addressing Modes
鈥?Bit, Byte, Word, and Block Move Operations
Ordering Information
ORDERING NUMBER
5962R9572201QQC
5962R9572201QXC
5962R9572201VQC
5962R9572201VXC
HS1-80C86RH/Proto
HS9-80C86RH/Proto
INTERNAL
MKT. NUMBER
HS1-80C86RH-8
HS9-80C86RH-8
HS1-80C86RH-Q
HS9-80C86RH-Q
HS1-80C86RH/Proto
HS9-80C86RH/Proto
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
鈥?8-Bit and 16-Bit Signed/Unsigned Arithmetic
- Binary or Decimal
- Multiply and Divide
鈥?Bus-Hold Circuitry Eliminates Pull-up Resistors for CMOS
Designs
鈥?Hardened Field, Self-Aligned, Junction-Isolated CMOS
Process
鈥?Single 5V Power Supply
鈥?Military Temperature Range . . . . . . . . . . . -35
o
C to 125
o
C
鈥?Minimum LET for
Single Event Upset . . . . . . . . . . . . . 6MEV/mg/cm
2
(Typ)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright 漏 Intersil Corporation 2000

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