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HS9-6617RH-8 Datasheet

  • HS9-6617RH-8

  • Radiation Hardened 2K x 8 CMOS PROM

  • 131.70KB

  • 14頁

  • INTERSIL   INTERSIL

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HS-6617RH
August 1995
Radiation Hardened
2K x 8 CMOS PROM
Pinouts
24 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T24
TOP VIEW
A7
A6
A5
A4
A3
A2
A1
A0
Q0
1
2
3
4
5
6
7
8
9
24 VDD
23 A8
22 A9
21 P
20 G
19 A10
18 E
17 Q7
16 Q6
15 Q5
14 Q4
13 Q3
Features
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Total Dose 1 x 10
5
RAD (Si)
Latch-Up Free >1 x 10
12
RAD (Si)/s
Field Programmable
Functionally Equivalent to HM-6617
Pin Compatible with Intel 2716
Low Standby Power 1.1mW Max
Low Operating Power 137.5mW/MHz Max
Fast Access Time 100ns Max
TTL Compatible Inputs/Outputs
Synchronous Operation
On Chip Address Latches
Three-State Outputs
Nicrome Fuse Links
Easy Microprocessor Interfacing
Military Temperature Range -55
o
C to +125
o
C
Q1 10
Q2 11
GND 12
Description
The Intersil HS-6617RH is a radiation hardened 16K CMOS PROM,
organized in a 2K word by 8-bit format. The chip is manufactured
using a radiation hardened CMOS process, and is designed to be
functionally equivalent to the HM-6617. Synchronous circuit design
techniques combine with CMOS processing to give this device high
speed performance with very low power dissipation.
On chip address latches are provided, allowing easy interfacing with
recent generation microprocessors that use multiplexed address/data
bus structure, such as the HS-80C85RH or HS-80C86RH. The output
enable control (G) simpli鏗乪s microprocessor system interfacing by
allowing output data bus control, in addition to, the chip enable
control. Synchronous operation of the HS-6617RH is ideal for high
speed pipe-lined architecture systems and also in synchronous logic
replacement functions.
Applications for the HS-6617RH CMOS PROM include low power
microprocessor based instrumentation and communications systems,
remote data acquisition and processing systems, processor control
store, and synchronous logic replacement.
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
GND
24 LEAD CERAMIC METAL SEAL FLATPACK
PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F24
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VDD
A8
A9
P
G
A10
E
Q7
Q6
Q5
Q4
Q3
Ordering Information
PART NUMBER
HS1-6617RH-Q
HS1-6617RH-8
HS1-6617RH/SAMPLE
HS1-6617RH/PROTO
HS9-6617RH-Q
HS9-6617RH-8
HS9-6617RH/Sample
HS9-6617RH/PROTO
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
25
o
C
-55
o
C
-55
o
C
-55
o
C
to
to
to
+125
o
C
+125
o
C
+125
o
C
PACKAGE
24 Lead SBDIP
24 Lead SBDIP
24 Lead SBDIP
24 Lead SBDIP
24 Lead Flatpack
24 Lead Flatpack
24 Lead Flatpack
24 Lead Flatpack
PIN
A
Q
E
G
P
DESCRIPTION
Address Input
Data Output
Chip Enable
Output Enable
Program Enable (P Hardwired to
VDD, except during programming)
DB NA
25
o
C
-55
o
C to +125
o
C
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
漏
Intersil Corporation 1999
Spec Number
File Number
1
518742
3033.3

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