HS-82C54RH
August 1995
Radiation Hardened CMOS
Programmable Interval Timer
Pinouts
24 LEAD CERAMIC DUAL-IN-LINE METAL SEAL
PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T24
TOP VIEW
D7 1
D6 2
D5 3
D4 4
D3 5
D2 6
D1 7
D0 8
CLK 0 9
OUT 0 10
GATE 0 11
GND 12
24 VDD
23 WR
22 RD
21 CS
20 A1
19 A0
18 CLK 2
17 OUT 2
16 GATE 2
15 CLK 1
14 GATE 1
13 OUT 1
Features
鈥?Radiation Hardened
- Total Dose > 10
5
RAD (Si)
- Transient Upset > 10
8
RAD (Si)/sec
- Latch Up Free EPI-CMOS
- Functional After Total Dose 1 x 10
6
RAD (Si)
鈥?Low Power Consumption
- IDDSB = 20碌A(chǔ)
- IDDOP = 12mA
鈥?Pin Compatible with NMOS 8254 and the Intersil 82C54
鈥?High Speed, 鈥淣o Wait State鈥?Operation with 5MHz
HS-80C86RH
鈥?Three Independent 16-Bit Counters
鈥?Six Programmable Counter Modes
鈥?Binary or BCD Counting
鈥?Status Read Back Command
鈥?Hardened Field, Self-Aligned, Junction Isolated CMOS Process
鈥?Single 5V Supply
鈥?Military Temperature Range -55
o
C to +125
o
C
Description
The Intersil HS-82C54RH is a high performance, radiation hardened
CMOS version of the industry standard 8254 and is manufactured
using a hardened 鏗乪ld, self-aligned silicon gate CMOS process. It has
three independently programmable and functional 16-bit counters,
each capable of handling clock input frequencies of up to 5MHz. Six
programmable timer modes allow the HS-82C54RH to be used as an
event counter, elapsed time indicator, a programmable one-shot, or
for any other timing application. The high performance, radiation
hardness, and industry standard con鏗乬uration of the HS-82C54RH
make it compatible with the HS-80C86RH radiation hardened micro-
processor.
Static CMOS circuit design insures low operating power. The Intersil
hardened 鏗乪ld CMOS process results in performance equal to or
greater than existing radiation resistant products at a fraction of the
power.
24 LEAD CERAMIC METAL SEAL FLATPACK
PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F24
TOP VIEW
D7
D6
D5
D4
D3
D2
D1
D0
CLK 0
OUT 0
GATE 0
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VDD
WR
RD
CS
A1
A0
CLK 2
OUT 2
GATE 2
CLK 1
GATE 1
OUT1
Ordering Information
PART NUMBER
HS1-82C54RH-Q
HS1-82C54RH-8
HS1-82C54RH-Sample
HS9-82C54RH-Q
HS9-82C54RH-8
HS9-82C54RH/Sample
HS9-82C54RH/Proto
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
-55
o
C to +125
o
C
24 Lead SBDIP
24 Lead SBDIP
24 Lead SBDIP
24 Lead Ceramic Flatpack
24 Lead Ceramic Flatpack
24 Lead Ceramic Flatpack
24 Lead Ceramic Flatpack
DB NA
PACKAGE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
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Copyright
漏
Intersil Corporation 1999
Spec Number
File Number
948
518059
3043.1