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HS-82C37 Datasheet

  • HS-82C37

  • Radiation Hardened CMOS High Performance Programmable DMA Co...

  • 28頁

  • HARRIS   HARRIS

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S E M I C O N D U C T O R
HS-82C37ARH
Radiation Hardened CMOS High
Performance Programmable DMA Controller
Description
The Harris HS-82C37ARH is an enhanced, radiation
hardened CMOS version of the industry standard 8237A
Direct Memory Access (DMA) controller, fabricated using the
Harris hardened 鏗乪ld, self-aligned silicon gate CMOS
process. The HS-82C37ARH offers increased functionality,
improved performance, and dramatically reduced power
consumption for the radiation environment. The high speed,
radiation hardness, and industry standard con鏗乬uration of
the HS-82C37ARH make it compatible with radiation
hardened microprocessors such as the HS-80C85RH and
the HS-80C86RH.
The HS-82C37ARH can improve system performance by
allowing external devices to transfer data directly to or from
system memory. Memory-to-memory transfer capability is
also provided, along with a memory block initialization
feature. DMA requests may be generated by either
hardware or software, and each channel is independently
programmable with a variety of features for 鏗俥xible
operation.
Static CMOS circuit design insures low operating power and
allows gated clock operation for an even further reduction of
power. Multimode programmability allows the user to select
from three basic types of DMA services, and recon鏗乬uration
under program control is possible even with the clock to the
controller stopped. Each channel has a full 64K address and
word count range, and may be programmed to autoinitialize
these registers following DMA termination (end of process).
The Harris hardened 鏗乪ld CMOS process results in
performance equal to or greater than existing radiation resis-
tant products at a fraction of the power.
August 1995
Features
鈥?Radiation Hardened
- Total Dose >10
5
RAD (Si)
- Transient Upset > 10
8
RAD (Si)/s
- Latch Up Free EPI-CMOS
鈥?Low Power Consumption
- IDDSB = 50碌A(chǔ) Maximum
- IDDOP = 4.0mA/MHz Maximum
鈥?Pin Compatible with NMOS 8237A and the Harris
82C37A
鈥?High Speed Data Transfers Up To 2.5 MBPS With 5MHz
Clock
鈥?Four Independent Maskable Channels With Autoinitializa-
tion Capability
鈥?Expandable to Any Number of Channels
鈥?Memory-to-Memory Transfer Capability
鈥?CMOS Compatible
鈥?Hardened Field, Self-Aligned, Junction Isolated CMOS
Process
鈥?Single 5V Supply
鈥?Military Temperature Range -55
o
C to +125
o
C
Ordering Information
PART NUMBER
HS1-82C37ARH-Q
HS1-82C37ARH-8
HS1-82C37ARH-Sample
HS9-82C37ARH-Q
HS9-82C37ARH-8
HS9-82C37ARH/Sample
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
40 Lead SBDIP
40 Lead SBDIP
40 Lead SBDIP
42 Lead Ceramic Flatpack
42 Lead Ceramic Flatpack
42 Lead Ceramic Flatpack
PACKAGE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
漏
Harris Corporation 1995
Spec Number
File Number
1
518058
3042.1
DB NA

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