Agilent HPFC-5000 Tachyon
Fibre Channel Interface Controller
Product Brief
Description
Tachyon is a fundamental
building block compatible with
Agilent Technologies鈥?Fibre
Channel solution which includes
interface controllers, physical
link modules, adapters, switches
and disk drives.
Internal Block Diagram
The Internal Block Diagram in Figure 1 below shows the high-level
chip architecture for Tachyon.
Inbound
Message
Queue
Inbound
Data
MFS
SFS
Buffer Buffer
Queue Queue
Outbound
Host-Based
Data Structures
Command
Queue
SCSI
Exchange
State Table
High-Priority
Command
Queue
Outbound
Data
The Tachyon architecture sup-
ports both networking and mass
storage connections to provide a
low cost, high performance
solution with low host overhead.
Specifications
鈥?System clock frequency:
20 鈥?40 MHz backplane operation
鈥?Testability:
Full internal scan path
IEEE Standard 1149.1 boundary scan
鈥?Packaging:
208-pin metal quad flat pack
鈥?Standards:
Intended to be compliant with ANSI
standards and FCSI/FCA profile
definitions
Backplane Interface
Inbound
Block
Mover
Inbound
Message
Channel
Inbound SFS
and MFS Buffer
Channels
SCSI
Read/Write
Channel
Outbound
Message
Channel
High Priority
Message
Channel
Outbound
Block
Mover
FCP Assists
SCSI
SCSI
Buffer
Exchange
Manager
Manager
Sequence
Management
Outbound
Sequence
Manager
Inbound
Data
Manager
Inbound
Sequence
Manager
Inbound
Data
FIFO
Receive
OS Processor
CRC Checker
Elastic Store/
Smoothing Buffer
20B/16B
Decoder
10B/20B
De-MUX
ACKs
ACKs
ACK
FIFO
Outbound
Frame
FIFO
Transmit
OS/CRC
Generator
Loop/N_Port
State Machine
16B/20B
Encoder
20B/10B
MUX
Link
Figure 1.
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