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Input/Output Matching
Description
The HMMC-5038 MMIC is a high-
gain low-noise amplifier (LNA)
designed for communication
receivers that operate from
37 GHz to 40 GHz. The gain of
this four stage LNA can be
adjusted by altering the gate bias
of the output two, or three, stages
while maintaining optimum noise
figure bias for the input stage(s).
Large FETs provide high power
handing capability to avoid power
compression. The backside of the
chip is both RF and DC ground.
This helps simplify the assembly
process and reduce assembly
related performance variations
and costs.
The HMMC-5038 is fabricated
using a PHEMT integrated
circuit structure that provides
good noise and gain performance.
Chip Size:
Chip Size Tolerance:
Chip Thickness:
Pad Dimensions:
1630 x 760
碌m
(64.2 x 29.9 mils)
鹵
10
碌m
(鹵 0.4 mils)
127
鹵
15
碌m
(5.0
鹵
0.6 mils)
80 x 80
碌m
(3.1 x 3.1 mils)
Absolute Maximum Ratings
[1]
Symbol
V
D1, 2-3-4
I
G1, 2-3-4
I
DD
P
in
T
ch
T
A
T
STG
T
max
Parameters/Conditions
Drain Supply Voltages
Gate Supply Voltages
Total Drain Current
RF Input Power
Channel Temperature
[2]
Backside Ambient Temp.
Storage Temperature
Maximum Assembl
y Temp.
Units
V
V
mA
dBm
擄C
擄C
擄C
擄C
Min.
-3.0
Max.
5
0
300
15
+160
-55
-65
+125
+165
+310
Note:
1. Absolute maximum ratings for continuous operation unless otherwise noted.
2. Refer to DC Specifications/Physical Properties table for derating information.
6-53
5965-5445E