DUAL銆丗AST銆丼LOW銆両DLE銆丼LEEP Mode.
With WDT (WATCH DOG TIMER) to prevent deadlock condition.
12~36 bit Bi-directional I/O port. Mask Option can select PUSH-PULL or OPEN DRAIN output
mode for each I/O pin.
One built-in OP comparator.銆?/div>
2048~1280 dots LCD driver for 32 COM or 2304~1152 dots LCD driver for 48 COM (B TYPE
selectable). LV3 must less than 8.5V.
LCD refresh cycle of 85750 is different from other鈥檚 64 Hz. For this IC:
32 COM : Refresh Cycle=~170Hz錛?8 COM : Refresh Cycle=~110Hz.
One 7-bit current-type DAC output.
PWM device.
Two external interrupts and three internal timer interrupts.
Two 16-bit timer and one Time Base.
Instruction set錛?32 instructions, 4 addressing mode.
11-bit DATA POINTER
for RAM and
18-bit
TABLE POINTER
for ROM.
Operation Voltage錛?/div>
System Clock錛?/div>
1
V1.51E
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