音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

HDMP-0440 Datasheet

  • HDMP-0440

  • Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops

  • 10頁

  • AGILENT   AGILENT

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

Agilent HDMP-0440
Quad Port Bypass Circuit
for Fibre Channel Arbitrated Loops
Data Sheet
Features
鈥?Supports 1.0625 GBd Fibre
Channel operation
鈥?Supports 1.25 GBd Gigabit
Ethernet (GE) operation
鈥?Quad PBC in one package
鈥?Equalizers on all inputs
鈥?High-speed LVPECL I/O
鈥?Buffered Line Logic (BLL) outputs
(no external bias resistors
required)
鈥?0.5 W typical power at V
CC
= 3.3 V
鈥?44 Pin, 10 mm, low-cost plastic
QFP package
Applications
鈥?RAID, JBOD, BTS cabinets
鈥?Two 2:1 muxes
鈥?Two 1:2 buffers
鈥?1
鈮?/div>
N Gigabit serial buffer
鈥?N
鈮?/div>
1 Gigabit serial mux
Description
The HDMP-0440 is a Quad Port
Bypass Circuit (PBC), which
provides a low-cost, low-power
physical-layer solution for Fibre
Channel Arbitrated Loop (FC-AL)
disk array configurations. By using
a PBC such as the HDMP-0440,
hard disks may be pulled out or
swapped while other disks in the
array are available to the system.
A PBC consists of multiple 2:1
multiplexers daisy chained
together. Each port has two modes
of operation: 鈥渄isk in loop鈥?and
鈥渄isk bypassed.鈥?When the 鈥渄isk in
loop鈥?mode is selected, the loop
goes into and out of the disk drive
at that port. For example, data goes
from the HDMP-0440鈥檚
TO_NODE[n]鹵 differential output
pins to the Disk Drive Transceiver
IC鈥檚 (e.g. an HDMP-1636A) Rx
differential input pins. Data from
the Disk Drive Transceiver IC鈥檚 Tx
differential outputs goes to the
HDMP-0440鈥檚 FM_NODE[n]鹵
differential input pins. Figure 2
shows connection diagrams for
disk drive array applications.
When the 鈥渄isk bypassed鈥?mode
is selected, the disk drive is either
absent or non-functional and the
loop bypasses the hard disk.
The 鈥渄isk bypassed鈥?mode is
enabled by pulling the
BYPASS[n]- pin low. Leave
BYPASS[n]- floating to enable the
鈥渄isk in loop鈥?mode. HDMP-
0440s may be cascaded with
other members of the HDMP-
04XX/HDMP-05XX family
through the appropriate
FM_NODE[n]鹵 and
TO_NODE[n]鹵 pins to
accommodate any number of
hard disks (see Figure 3). The
unused cells in the HDMP-0440
may be bypassed by using
pulldown resistors on the
BYPASS[n]- pins for these cells.
An HDMP-0440 may also be
configured as five 1:1 buffers, as
two 2:1 multiplexers or as two
1:2 buffers.
HDMP-0440
CAUTION:
As with all semiconductor ICs, it is advised that normal static precautionsb be taken in
the handling and assembly of this component to prevent damage and/or degradation which may be
induced by electrostatic discharge (ESD).

HDMP-0440相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    Optoelectronic
    ETC
  • 英文版
    Optoelectronic
    ETC
  • 英文版
    FIBER OPTIC SUPPORT CIRCUIT
    ETC
  • 英文版
    FIBER OPTIC SUPPORT CIRCUIT
    ETC
  • 英文版
    FIBER OPTIC SUPPORT CIRCUIT
    ETC
  • 英文版
    1.0625-1.25 GBd Single Port Bypass Circuit wirh CDR for Fibr...
    ETC
  • 英文版
    Port Bypass Circuits for Fibre Channel Arbitrated Loop Stand...
    HP [Agilen...
  • 英文版
    Single Port Bypass Circuit with CDR & Data Valid Detection C...
    HP [Agilen...
  • 英文版
    Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops
    AGILENT
  • 英文版
    Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops
    HP [Agilen...
  • 英文版
    Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops
    AGILENT
  • 英文版
    Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops
    HP [Agilen...
  • 英文版
    Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrat...
    AGILENT
  • 英文版
    Quad Port Bypass Circuit with CDR for Fibre Channel Arbitrat...
    HP [Agilen...
  • 英文版
    Octal Cell Port Bypass Circuit without Clock and Data Recove...
    AGILENT
  • 英文版
    Octal Cell Port Bypass Circuit without Clock and Data Recove...
    HP [Agilen...
  • 英文版
    Octal Cell Port Bypass Circuit with CDR and Data Valid Detec...
    HP [Agilen...
  • 英文版
    AGILENT HDMP-0552 QUAD PORT BYPASS CIRCUIT WITH CDR AND DATA...
    ETC
  • 英文版
    AGILENT HDMP-0552 QUAD PORT BYPASS CIRCUIT WITH CDR A...
    ETC [ETC]
  • 英文版
    Receiver
    ETC

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！