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HD74LVCZ16245ATEL Datasheet

  • HD74LVCZ16245ATEL

  • 16?bit Bidirectional Transceivers with 3?state Outputs

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  • RENESAS

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HD74LVCZ16245A
16鈥揵it Bidirectional Transceivers with 3鈥搒tate Outputs
REJ03D0375鈥?200
(Previous ADE-205-233 (Z))
Rev.2.00
Aug. 20.2004
Description
The HD74LVCZ16245A has sixteen two direction buffers, for the fittest at two direction bus lines with three state
outputs in a 48 pin package. When (DIR) is high, data flows from the A inputs to the B outputs, and when (DIR) is
low, data flows from the B inputs to the A outputs. A and B bus are separated by making enable input (G) high level.
When V
CC
is between 0 and 1.5 V, the device is in the high impedance state during power up or power down.
Low voltage and high-speed operation is suitable at battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
V
CC
= 2.7 to 5.5 V
All inputs V
IH
(Max) = 5.5 V (@V
CC
= 0 to 5.5 V)
All inputs / outputs V
I/O
(Max) = 5.5 V (@V
CC
= 0 V or output off state)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25擄C)
High impedance state during power up and power down
Power off disables outputs, permitting live insertion
High output current 鹵24 mA (@V
CC
= 3.0 to 5.5 V)
Ordering Information
Package Type
TSSOP鈥?8 pin
Package Code
TTP鈥?8DBV
Package
Abbreviation
T
Taping Abbreviation
(Quantity)
EL (1,000 pcs/reel)
Part Name
HD74LVCZ16245ATEL
Function Table
Inputs
G
L
L
H
H: High level
L: Low level
X: Immaterial
Z: High impedance
DIR
L
H
X
Operation
B data to A bus
A data to B bus
Z
Rev.2.00 Aug. 20, 2004 page 1 of 7

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