音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

HD74LV595ATELL Datasheet

  • HD74LV595ATELL

  • 8-bit Shift Registers with 3-state Outputs

  • 14頁

  • RENESAS

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

HD74LV595A
8-bit Shift Registers with 3-state Outputs
REJ03D0335鈥?200Z
(Previous ADE-205-281 (Z))
Rev.2.00
Jun. 28, 2004
Description
This device each contains an 8-bit serial-in, parallel-out shift registers that feeds an 8-bit D-type storage register. The
storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage
register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading.
Both the shift register and the storage register clocks are positive-edge triggered. If the user wishes to connect both
clocks together, the shift register state will always be one clock pulse ahead of the storage register. Low-voltage and
high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power
consumption extends the battery life.
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25擄C)
Output current 鹵6 mA (@V
CC
= 3.0 V to 3.6 V), 鹵12 mA (@V
CC
= 4.5 V to 5.5 V)
Ordering Information
Package Type
SOP鈥?6 pin (JEITA)
SOP鈥?6 pin (JEDEC)
TSSOP鈥?6 pin
Package Code
FP鈥?6DAV
FP鈥?6DNV
TTP鈥?6DAV
Package
Abbreviation
FP
RP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Part Name
HD74LV595AFPEL
HD74LV595ARPEL
HD74LV595ATELL
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
SER
X
X
X
L
H
X
X
X
Note: H:
L:
X:
鈫?
鈫?
SRCLK
SRCLR
X
X
X
X
X
L
鈫?/div>
H
鈫?/div>
H
鈫?/div>
H
X
X
X
X
High level
Low level
Immaterial
Low to high transition
High to low transition
RCLK
X
X
X
X
X
X
鈫?/div>
鈫?/div>
G
H
L
X
X
X
X
X
X
Function
Force outputs into high-impedance state
Enable parallel output
Reset shift register
Shift data into shift register
Shift data into shift register
Shift register remains unchanged
Transfer shift register contents to latch register
Latch register remains unchanged
Rev.2.00 Jun. 28, 2004 page 1 of 13

HD74LV595ATELL相關(guān)型號(hào)PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！