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HD74LV393A Datasheet

  • HD74LV393A

  • Dual 4-bit Binary Counters

  • 11頁

  • RENESAS

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HD74LV393A
Dual 4-bit Binary Counters
REJ03D0333鈥?300Z
(Previous ADE-205-276A (Z))
Rev.3.00
Jun. 28, 2004
Description
The HD74LV393A contain two 4-bit ripple carry binary counters, which can be cascaded to create a single divide-by-
256 counter.
The HD74LV393A is incremented on the high to low transition (negative edge) of the clock input, and each has an
independent clear input. When clear is set high all four bits of each counter is set to a low level. This enables count
truncation and allows the implementation of divide-by-N counter configurations.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the
low-power consumption extends the battery life.
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25擄C)
Output current 鹵6 mA (@V
CC
= 3.0 V to 3.6 V), 鹵12 mA (@V
CC
= 4.5 V to 5.5 V)
Ordering Information
Package Type
SOP鈥?4 pin(JEITA)
SOP鈥?4 pin(JEDEC)
TSSOP鈥?4 pin
Package Code
FP鈥?4DAV
FP鈥?4DNV
TTP鈥?4DV
Package
Abbreviation
FP
RP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Part Name
HD74LV393AFPEL
HD74LV393ARPEL
HD74LV393ATELL
Note: Please consult the sales office for the above package availability.
Rev.3.00 Jun. 28, 2004 page 1 of 10

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