音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

HD74LV373AFP Datasheet

  • HD74LV373AFP

  • LATCH|SINGLE|8-BIT|LV-CMOS|SOP|14PIN|PLASTIC

  • 16頁

  • ETC

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

HD74LV373A
Octal D-type Transparent Latches with 3-state Outputs
ADE-205-274 (Z)
1st Edition
April 1999
Description
The HD74LV373A has eight D type latches with three state outputs in a 20 pin package. When the latch
enables input is high, the Q outputs will follow the D inputs. When the latch enables goes low, data at the
D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is
applied to the output control input, all outputs go to a high impedance state, regardless of what signals are
present at the other inputs and the state of the storage elements. Low-voltage and high-speed operation is
suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption
extends the battery life.
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25擄C)
Output current
鹵8
mA (@V
CC
= 3.0 V to 3.6 V),
鹵16
mA (@V
CC
= 4.5 V to 5.5 V)
Function Table
Inputs
OE
H
L
L
L
Note: H:
L:
X:
Z:
Q
0
:
LE
X
H
H
L
D
X
L
H
X
Output Q
Z
L
H
Q
0
High level
Low level
Immaterial
High impedance
Output level before the indicated steady state input conditions were established.

HD74LV373AFP相關(guān)型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！