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HD74LV2GT241A Datasheet

  • HD74LV2GT241A

  • Datasheet|ADE-205-679|MAR.20.02|85K

  • 10頁(yè)

  • ETC

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HD74LV2GT241A
Dual Bus Buffer Noninverted with 3鈥搒tate Output
ADE-205-679 (Z)
Rev. 0
Mar. 2002
Description
The HD74LV2GT241A has dual bus buffer noninverted with 3鈥搒tate output in a 8 pin package. Two
noninverters are included in one circuit. Each circuit can be independently controlled by the enable signal
OE
or OE, which enables outputs when receiving a low or high level signal, respectively. Low voltage and
high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low
power consumption extends the battery life.
Features
鈥?/div>
The basic gate function is lined up as hitachi uni logic series.
鈥?/div>
Supplied on emboss taping for high speed automatic mounting.
鈥?/div>
TTL compatible input level.
Supply voltage range : 4.5 to 5.5 V
Operating temperature range : 鈥?0 to +85擄C
鈥?/div>
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V, Output : Z)
鈥?/div>
Output current 鹵12 mA (@V
CC
= 4.5 V to 5.5 V)
鈥?/div>
All the logical input has hysteresis voltage for the slow transition.
鈥?/div>
Package type
Package type
SSOP-8 pin
Package code
TTP-8DB
Package suffix
US
Taping code
E (3,000 pcs / Reel)

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