音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

HD74LV2GT125A Datasheet

  • HD74LV2GT125A

  • Dual Bus Buffer with 3?state Output / CMOS Logic Level Shift...

  • 9頁(yè)

  • RENESAS

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

HD74LV2GT125A
Dual Bus Buffer with 3鈥搒tate Output /
CMOS Logic Level Shifter
REJ03D0148鈥?200Z
(Previous ADE-205-676A (Z))
Rev.2.00
Oct.23.2003
Description
The HD74LV2GT125A has dual bus buffer with 3鈥搒tate output in an 8 pin package. Output is disabled
when the associated output enable (OE) input is high. To ensure the high impedance state during power up
or power down,
OE
should be connected to V
CC
through a pull-up resistor; the minimum value of the
resistor is determined by the current sinking capability of the driver. The input protection circuitry on this
device allows over voltage tolerance on the input, allowing the device to be used as a logic鈥搇evel translator
from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while
operating at the high-voltage power supply. Low voltage and high-speed operation is suitable for the
battery powered products (e.g., notebook computers), and the low power consumption extends the battery
life.
Features
鈥?/div>
The basic gate function is lined up as Renesas uni logic series.
鈥?/div>
Supplied on emboss taping for high-speed automatic mounting.
鈥?/div>
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : 鈥?0 to +85擄C
鈥?/div>
Logic-level translate function
3.0 V CMOS logic
鈫?/div>
5.0 V CMOS logic (@V
CC
= 5.0 V)
1.8 V or 2.5 V CMOS logic
鈫?/div>
3.3 V CMOS logic (@V
CC
= 3.3 V)
鈥?/div>
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V, Output : Z)
鈥?/div>
Output current 鹵6 mA (@V
CC
= 3.0 V to 3.6 V), 鹵12 mA (@V
CC
= 4.5 V to 5.5 V)
鈥?/div>
All the logical input has hysteresis voltage for the slow transition.
鈥?/div>
Ordering Information
Part Name
HD74LV2GT125AUSE
Package Type
SSOP-8 pin
Package Code
TTP-8DBV
Package
Abbreviation
US
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
Rev.2.00, Oct.23.2003, page 1 of 1

HD74LV2GT125A相關(guān)型號(hào)PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫(kù)提出的寶貴意見(jiàn)，您的參與是維庫(kù)提升服務(wù)的動(dòng)力！意見(jiàn)一經(jīng)采納，將有感恩紅包奉上哦！