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HD74LV1GT08AVSE Datasheet

  • HD74LV1GT08AVSE

  • 2?input AND Gate / CMOS Logic Level Shifter

  • 11頁(yè)

  • RENESAS

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HD74LV1GT08A
2鈥搃nput AND Gate / CMOS Logic Level Shifter
REJ03D0118鈥?800Z
(Previous ADE-205-328F (Z))
Rev.8.00
Sep.24.2003
Description
The HD74LV1GT08A is high-speed CMOS two input AND gate using silicon gate CMOS process. With
CMOS low power dissipation, it provides high-speed equivalent to LS鈥揟TL series. The internal circuit of
three stages construction with buffer provides wide noise margin and stable output. The input protection
circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a
logic鈥搇evel translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V
CMOS Logic while operating at the high-voltage power supply. Low voltage and high-speed operation is
suitable for the battery powered products (e.g., notebook computers), and the low power consumption
extends the battery life.
Features
鈥?/div>
The basic gate function is lined up as Renesas uni logic series.
鈥?/div>
Supplied on emboss taping for high-speed automatic mounting.
鈥?/div>
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : 鈥?0 to +85擄C
鈥?/div>
Logic-level translate function
3.0 V CMOS logic
鈫?/div>
5.0 V CMOS logic (@V
CC
= 5.0 V)
1.8 V or 2.5 V CMOS logic
鈫?/div>
3.3 V CMOS logic (@V
CC
= 3.3 V)
鈥?/div>
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
鈥?/div>
Output current 鹵6 mA (@V
CC
= 3.0 V to 3.6 V), 鹵12 mA (@V
CC
= 4.5 V to 5.5 V)
鈥?/div>
All the logical input has hysteresis voltage for the slow transition.
鈥?/div>
Ordering Information
Part Name
Package Type
Package Code
CMPAK-5V
CMPAK-5V(O)
HD74LV1GT08AVSE VSON-5 pin
TNP-5DV
VS
Package
Abbreviation
CM
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
HD74LV1GT08ACME CMPAK-5 pin
Rev.8.00, Sep.24.2003, page 1 of 10

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