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HD74LV1G126A_08 Datasheet

  • HD74LV1G126A_08

  • Bus Buffer Gate with 3-state Output

  • 8頁(yè)

  • RENESAS

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HD74LV1G126A
Bus Buffer Gate with 3鈥搒tate Output
REJ03D0072-0700
Rev.7.00
Mar 21, 2008
Description
The HD74LV1G126A has a bus buffer gate with 3鈥搒tate output in a 5 pin package. Output is disabled when the
associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE
should be connected to V
CC
through a pull-down resistor; the minimum value of the resistor is determined by the current
sourcing capability of the driver. Low voltage and high-speed operation is suitable for the battery powered products
(e.g., notebook computers), and the low power consumption extends the battery life.
Features
鈥?/div>
The basic gate function is lined up as Renesas uni logic series.
鈥?/div>
Supplied on emboss taping for high-speed automatic mounting.
鈥?/div>
Electrical characteristics equivalent to the HD74LV126A
Supply voltage range : 1.65 to 5.5 V
Operating temperature range : 鈥?0 to +85擄C
鈥?/div>
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V, Output : Z)
鈥?/div>
Output current 鹵6 mA (@V
CC
= 3.0 V to 3.6 V), 鹵12 mA (@V
CC
= 4.5 V to 5.5 V)
鈥?/div>
All the logical input has hysteresis voltage for the slow transition.
鈥?/div>
Ordering Information
Part Name
HD74LV1G126ACME
HD74LV1G126AVSE
Note:
Package Type
CMPAK鈥? pin
VSON鈥? pin
Package Code
(Previous Code)
PTSP0005ZC-A
(CMPAK-5V)
PUSN0005KA-A
(TNP-5DV)
Package
Abbreviation
CM
VS
Taping Abbreviation
(Quantity)
E (3000 pcs/reel)
E (3000 pcs/reel)
Please consult the sales office for the above package availability.
Outline and Article Indication
鈥?HD74LV1G126A
Index band
Marking
L
C
CMPAK鈥?
= Control code
REJ03D0072-0700 Rev.7.00, Mar 21, 2008
Page 1 of 7

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