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HD74LV139AFP Datasheet

  • HD74LV139AFP

  • DECODER/DEMUX|2-TO-4-LINE|LV-CMOS|SOP|16PIN|PLASTIC

  • 9頁

  • ETC

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a
HD74LV139A
Dual 2-to-4 line Decoder / Demultiplexers
ADE-205-262 (Z)
1st Edition
March 1999
Description
The HD74LV139A is designed to be used in high-performance memory-decoding or data-routing applica-
tions requiring very short propagation delay times. The active-low enable input can be used as a data line in
demultiplexing applications.
This decoder/demultiplexer features fully buffered inputs, each of which represents only one normalized load
to its driving circuit.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook comput-
ers), and the low-power consumption extends the battery life.
Features
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V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25擄C)
Output current
鹵6
mA (@V
CC
= 3.0 V to 3.6 V),
鹵12
mA (@V
CC
= 4.5 V to 5.5 V)
Function Table
Inputs
Select
G1
H
L
L
L
L
B
X
L
L
H
H
A
X
L
H
L
H
Outputs
Y0
H
L
H
H
H
Y1
H
H
L
H
H
Y2
H
H
H
L
H
Y3
H
H
H
H
L
Note: H:High level
L:Low level
X:Immaterial

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