HD74HCT640/HD74HCT643
Octal Bus Transceivers (with 3-state outputs)
Description
Both the HD74HCT640 and the HD74HCT643 have one active low enable input (G), and a direction
control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is
low, data flows from B to A.
The HD74HCT640 transfers inverted data from one bus to the other. The HD74HCT643 transfers inverted
data from the A bus to the B bus and non-inverted data from the B bus to the A bus.
Features
鈥?/div>
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
鈥?/div>
High Speed Operation: t
pd
(A to B) = 14.5 ns typ (C
L
= 50 pF)
鈥?/div>
High Output Current: Fanout of 15 LSTTL Loads
鈥?/div>
Wide Operating Voltage: V
CC
= 4.5 to 5.5 V
鈥?/div>
Low Input Current: 1 碌A max
鈥?/div>
Low Quiescent Supply Current: I
CC
(static) = 4 碌A max (Ta = 25擄C)
Function Table
Control Input
G
L
L
H
DIR
L
H
X
Operation
HD74HCT640
B
data to A bus
A
data to B bus
Isolation
HD74HCT643
B data to A bus
A
data to B bus
Isolation
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