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HD74HC377 Datasheet

  • HD74HC377

  • Octal D-type Flip-Flops (with Enable)

  • 9頁

  • HITACHI

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HD74HC377
Octal D-type Flip-Flops (with Enable)
Description
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse if the enable input
G
is low. Clock triggering occurs at a particular
voltage level and is not directly related to the transition time of the positive-going pulse. When the clock
input is at either the high or low level, the D input signal has no effect at the output. The circuits are
designed to prevent false clocking by transitions at the
G
input.
Features
鈥?/div>
High Speed Operation: t
pd
= 13 ns typ (C
L
= 50 pF)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 碌A(chǔ) max
Low Quiescent Supply Current: I
CC
(static) = 4 碌A(chǔ) max (Ta = 25擄C)
Function Table
Inputs
Enable
G
H
L
L
X
L
Clock
X
Data
X
H
L
X
Outputs
Q
Q
0
H
L
Q
0
Q
Q
0
L
H
Q
0

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