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HD74HC294 Datasheet

  • HD74HC294

  • Hitachi Semiconductor [Programmable Frequency Divider/Digit...

  • HITACHI

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HD74HC292/HD74HC294
Programmable Frequency Divider/Digital Timer
Description
This device divides the incoming clock frequency by a number (a power of 2) that is preset by the
Programming inputs. It has two Clock inputs, either of which may be used as a clock inhibit. The device
also has an active-low Reset, which initializes the internal flip-flop states. Test Point outputs (TP1, TP2,
TP3) are provided with HD74HC292 to facilitate incoming inspections.
Test Point output is provided with HD74HC294 to facilitate incoming inspections.
Features
鈥?/div>
High Speed Operation: t
pd
(Clock to Q) = 16 ns typ (C
L
= 50 pF)
鈥?/div>
High Output Current: Fanout of 10 LSTTL Loads
鈥?/div>
Wide Operating Voltage: V
CC
= 2 to 6 V
鈥?/div>
Low Input Current: 1 碌A(chǔ) max
鈥?/div>
Low Quiescent Supply Current: I
CC
(static) = 4 碌A(chǔ) max (Ta = 25擄C)
Function Table
CLR
L
H
H
H
H
L
H
X
X
H
CLK1
X
CLK2
X
L
Q Output Mode
Cleared to L
Count
Count
Inhibit
Inhibit

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