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HD74CDCV857 Datasheet

  • HD74CDCV857

  • 2.5-V Phase-lock Loop Clock Driver

  • 63.72KB

  • 15頁

  • HITACHI

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HD74CDCV857
2.5-V Phase-lock Loop Clock Driver
ADE-205-335C (Z)
Preliminary
4th Edition
March 2000
Description
The HD74CDCV857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is
specifically designed for use with DDR (Double Data Rate) synchronous DRAMs.
Features
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Supports 60 MHz to 200 MHz operation range
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Distributes one differential clock input pair to ten differential clock outputs pairs
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Supports spread spectrum clock requirements meeting the PC100 SDRAM registered DIMM
specification
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External feedback pins (FBIN,
FBIN)
are used to synchronize the outputs to the clock input
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Supports 2.5V analog supply voltage (AV
CC
), and 2.5 V V
DDQ
No external RC network required
Sleep mode detection
48pin TSSOP (Thin Shrink Small Outline Package)

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