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HD74ALVCH16827 Datasheet

  • HD74ALVCH16827

  • 20-bit Buffers / Drivers with 3-state Outputs

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HD74ALVCH16827
20-bit Buffers / Drivers with 3-state Outputs
ADE-205-140B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH16827 is composed of two 10-bit sections with separated output enable signals. For
either 10-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both
be low for the corresponding Y outputs to be active. If either output enable input is high, the outputs of that
10-bit buffer section are in the high impedance state. Active bus hold circuitry is provided to hold unused
or floating data inputs at a valid logic level.
Features
鈥?/div>
V
CC
= 2.3 V to 3.6 V
鈥?/div>
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
High output current
鹵24
mA (@V
CC
= 3.0 V)
鈥?/div>
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
Function Table
Inputs
OE1
L
L
H
X
H : High level
L : Low level
X : Immaterial
Z : High impedance
OE2
L
L
X
H
A
L
H
X
X
L
H
Z
Z
Output Y

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