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HD74ALVCH16825 Datasheet

  • HD74ALVCH16825

  • 18-bit Buffers / Drivers with 3-state Outputs

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HD74ALVCH16825
18-bit Buffers / Drivers with 3-state Outputs
ADE-205-172A (Z)
2nd. Edition
December 1999
Description
The HD74ALVCH16825 improves the performance and density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and transmitters. The device can be used as two 9-bit buffers or one 18-
bit buffer. It provides true data. The 3-state control gate is a 2-input AND gate with active low inputs so
that if either output enable (OE1 or
OE2)
input is high, all nine affected outputs are in the high impedance
state. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Features
鈥?/div>
V
CC
= 2.3 V to 3.6 V
鈥?/div>
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
High output current
鹵24
mA (@V
CC
= 3.0 V)
鈥?/div>
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
Function Table
Inputs
OE1
L
L
H
X
H : High level
L : Low level
X : Immaterial
Z : High impedance
OE2
L
L
X
H
A
L
H
X
X
L
H
Z
Z
Output Y

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