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HD74ALVCH162820 Datasheet

  • HD74ALVCH162820

  • 3.3-V 10-bit Flip Flops with Dual Outputs and 3-state Output...

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  • HITACHI

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HD74ALVCH162820
3.3-V 10-bit Flip Flops with Dual Outputs and 3-state Outputs
ADE-205-185B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH162820 flip flops are edge triggered D-type flip flops. On the positive transition of the
clock (CLK) input, the device provides true data at the Q outputs. A buffered output enable (OE) input can
be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high
impedance state. In the high impedance state, the outputs neither load nor drive the bus lines significantly.
The high impedance state and increased drive provide the capability to drive bus line without need for
interface or pullup components.
OE
does not affect the internal operations of the flip flops. Old data can
be retained or new data can be entered while the outputs are in the high impedance state. Active bus hold
circuitry is provided to hold unused or floating data inputs at a valid logic level. All outputs, which are
designed to sink up to 12 mA, include 26
鈩?/div>
resistors to reduce overshoot and undershoot.
Features
鈥?/div>
V
CC
= 2.3 V to 3.6 V
鈥?/div>
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
High output current
鹵12
mA (@V
CC
= 3.0 V)
鈥?/div>
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
鈥?/div>
All outputs have equivalent 26
鈩?/div>
series resistors, so no external resistors are required.

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