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HD74ALVCH162260 Datasheet

  • HD74ALVCH162260

  • 12-bit to 24-bit Multiplexed D-type Latches with 3-state Out...

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HD74ALVCH162260
12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs
ADE-205-177B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH162260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two
separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical
applications include multiplexing and / or demultiplexing of address and data information in
microprocessor or bus interface applications. This device is also useful in memory interleaving
applications. Three 12-bit I / O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available for address and /
or data transfer. The output enable (OE1B,
OE2B,
and
OEA)
inputs control the bus transceiver functions.
The
OE1B
and
OE2B
control signals also allow bank control in the A-to-B direction. Address and / or data
information can be stored using the internal storage latches. The latch enable (LE1B, LE2B, LEA1B, and
LEA2B) inputs are used to control data storage. When the latch enable input is high, the latch is
transparent. When the latch enable input goes low, the data present at the inputs is latched and remains
latched until the latch enable input is returned high. Active bus hold circuitry is provided to hold unused or
floating data inputs at a valid logic level. The B outputs, which are designed to sink up to 12 mA, include
26
鈩?/div>
resistors to reduce overshoot and undershoot.
Features
鈥?/div>
V
CC
= 2.3 V to 3.6 V
鈥?/div>
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25擄C)
鈥?/div>
High output current
鹵12
mA (@V
CC
= 3.0 V)
鈥?/div>
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
鈥?/div>
B-port outputs have equivalent 26
鈩?/div>
series resistors, so no external resistors are required.

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