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HD74ALVC1G240VSE Datasheet

  • HD74ALVC1G240VSE

  • Buffer/Driver

  • 102.67KB

  • 13頁

  • ETC

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HD74ALVC1G240
Bus Buffer Inverted with 3-state Output
ADE-205-619A (Z)
Rev. 1
July 2001
Description
The HD74ALVC1G240 has a bus buffer inverted with 3-state output in a 5 pin package. Output is disabled
when the associated output enable (OE) input is high. To ensure the high impedance state during power up
or power down,
OE
should be connected to V
CC
through a pull-up resistor; the minimum value of the
resistor is determined by the current sinking capability of the driver. Low voltage and high speed operation
is suitable for the battery powered products (e.g., notebook computers), and the low power consumption
extends the battery life.
Features
鈥?/div>
The basic gate function is lined up as hitachi uni logic series.
鈥?/div>
Supplied on emboss taping for high speed automatic mounting.
鈥?/div>
Supply voltage range : 1.2 to 3.6 V
Operating temperature range :
鈭?0
to +85擄C
鈥?/div>
All inputs V
IH
(Max.) = 3.6 V (@V
CC
= 0 V to 3.6 V)
All outputs V
O
(Max.) = 3.6 V (@V
CC
= 0 V)
鈥?/div>
Output current
鹵2
mA (@V
CC
= 1.2 V)
鹵4
mA (@V
CC
= 1.4 V to 1.6 V)
鹵6
mA (@V
CC
= 1.65 V to 1.95 V)
鹵18
mA (@V
CC
= 2.3 V to 2.7 V)
鹵24
mA (@V
CC
= 3.0 V to 3.6 V)
鈥?/div>
Package type
Package type
VSON-5 pin
Package code
TNP-5D
Package suffix
VS
Taping code
E (3,000 pcs / Reel)

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