SH775x (SH-4 Series)
SuperH
廬
RISC Processor
Description
T
he SH775x device (in the SH-4 series of SuperH products) is a
high-performance, well integrated, cost-effective, 2-issue
superscalar RISC microprocessor for embedded applications.
The SH775x series delivers best-in-class performance, on-chip
integration and code size, with excellent low power consumption,
support tools and chipsets from Hitachi and third party vendors,
as well as a migration path to higher performance and lower
power. This complete package makes the SH775x series the
optimal choice for use in data processing, communications,
industrial, transportation and high-end consumer applications.
SH-4 CPU
鈥?Two-way superscalar RISC
鈥?300 MIPs
Memory Management Unit
鈥?Full Windows CE support
鈥?1K/4K/64K/1MByte page sizes
Unified TLB
64 entry
Micro ITLB
4 entry
Integer Unit
32 bit
Floating Point Unit
64 bit
Cache
Instruction
8 KByte
Data
16 KByte
鈥?WB/WT,
selectable
by page
Specialized Math Circuits
鈥?3D floating point
acceleration hardware
Peripheral Functions
鈥?DMA controller
鈥?Programmable power management
鈥?Interrupt controller
鈥?Timers
鈥?Real-time clock
鈥?Serial interface
鈥?User break controller
T
he SH775x series鈥?3D graphics capability (arithmetic
accelerator) combines with the 100MHz, 64-bit external bus
to deliver 800MB/s data throughput for workstation-class
performance at an affordable price. Several operating systems
and middleware applications run on the processors, with more in
development.
Bus Unit
Glueless interface
to SDRAM, EDO
DRAM, fast page
DRAM, SRAM,
and ROM
PCI Bus
Controller
33/66,
4ch DMAC
256-pin QFP
Features
鈥?General
鈥?Up to 200 MHz/360 MIPS (260MHz/480MIPS in 3Q01)
鈥?16 x 32-bit general purpose registers
鈥?CPU
鈥?Code compatible with SH-3 series
鈥?16 x 32-bit general purpose registers
鈥?32 x 32-bit single-precision floating point registers
or 16 x 64-bit double-precision floating point registers
or 4 x 128-bit single-precision vector registers and register
matrix
鈥?16-bit fixed instruction length for high code density
鈥?32 x 32 + 64
鉃?/div>
64 bits multiply-accumulate unit for special
functions such as software modems
鈥?MMU Designed for Windows廬CE 1KB, 4KB, 64KB, and 1MB
page sizes, 64-entry, fully associative TLB for instructions and
operands
鈥?4 entry, fully associative TLB for instructions
鈥?5 stage pipeline
鈥?Memory
鈥?On-chip cache, 8KB instruction (16KB in 3Q01)
and 16KB data (32KB in 3Q01)
鈥?Write back or write through, selectable by page
鈥?Low voltage cache to reduce power consumption
鈥?On-chip bus state controller allows direct connection to DRAM,
SDRAM, SRAM, ROM, and Flash ROM
鈥?8, 16, 32, or 64-bit data bus support
鈥?PCI Bus Controller
鈥?32-bit PCI bus controller (Rev 2.1)
鈥?33/66MHz operation
鈥?Host/Slave mode support
鈥?Supports up to 4 channels @ 33MHz, 1 channel @ 66MHz
鈥?Operation clock
鈥?Choose from internal clock or external clock (with divider)
32/16/8 bit data bus
32 bit bus
SH7751 Block Diagram
鈥?Dedicated 4-channel PCI DMAC
鈥?PCI to/from memory located on SuperH bus (Bus arbitration
capability between DMAC on PCI bus and SuperH bus)
鈥?On-chip FIFO enables fast data transfer
鈥?Peripherals
DMA, 4 channels
Timers, 3 channels x 32-bits
Watchdog timer
Realtime clock
PCMCIA control logic
Serial communications interface,
1 channel (asynchronous/synchronous, with smart card
interface)
鈥?Serial communication interface
1 channel (asynchronous, with 16 byte transmit and receive
FIFOs)
鈥?PLL with x1/8, x1/6,
x1/4, x1/2, x3/4, x1,
x3/2, x2, x3, x6 external
clock capability
鈥?Interrupt controller
鈥?General purpose I/O,
16 lines
鈥?Dynamic power control
鈥?Low power modes:
sleep and standby
鈥?Peripheral turn off
capability
鈥?User break controller for
on-chip debugging
鈥?/div>
HD6417751VF133相關(guān)型號PDF文件下載
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