HANBit
HCPMEM-512
EDO DRAM Board 512Mbyte ( 32M x 144-Bit ) organized as 4Banks of
8Mx144, 4K Ref., 3.3V, ECC
Part No. HCPMEM-512
GENERAL DESCRIPTION
The HCPMEM-512 is a 32M x 144 bit Dynamic RAM high-density module, organized with four banks of 8M x 144 bits.
The HCPMEM-512 consists of thirty six 8M x 16, 4K refresh DRAMs in TSOPII packages, five 16 bit buffer/drivers and one
PLD. The PLD controls the WRITE Enable and Output Enable signals to the DRAMS. Connectors on each side of the
module allow two memories to mated together.
FEATURES
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VTTL compatible inputs and outputs
10 bit Column addressing
Single 3.3V +/- .3 power supply
Buffered Address and Control lines
Mezzanine stackingAccess time: 60 ns (max)
Power dissipation
* Active: 7.5 W (max)
* Standby : 400 mW (max) (CMOS interface)
EDO page mode capability
CAS-before-RAS refreshRefresh cycles
FR4-PCB design
Application : Sun Microsystem CP 1400/1500
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The used device is HM5113165F-6
URL : www.hbe.co.kr
Rev. 1.0 (March, 2002)
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HANBit Electronics Co.,Ltd.
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