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HCPL2201 Datasheet

  • HCPL2201

  • Very High CMR, Wide VCC Logic Gate Optocouplers

  • 224.57KB

  • 17頁(yè)

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Very High CMR, Wide V
CC
Logic
Gate Optocouplers
Technical Data
HCPL-2201
HCPL-2211
HCPL-2231
HCPL-0201
HCNW2201
HCPL-2202
HCPL-2212
HCPL-2232
HCPL-0211
HCNW2211
Features
鈥?10 kV/
碌
s Minimum Common
Mode Rejection (CMR) at
V
CM
= 1000 V
(HCPL-2211/2212/0211/
2232, HCNW2211)
鈥?Wide Operating V
CC
Range:
4.5 to 20 Volts
鈥?300 ns Propagation Delay
Guaranteed over the Full
Temperature Range
鈥?5 Mbd Typical Signal Rate
鈥?Low Input Current (1.6 mA
to 1.8 mA)
鈥?Hysteresis
鈥?Totem Pole Output (No
Pullup Resistor Required)
鈥?Available in 8-Pin DIP,
SOIC-8, Widebody Packages
鈥?Guaranteed Performance
from -40
擄
C to 85
擄
C
鈥?Safety Approval
UL Recognized -2500 V rms
for 1 minute (5000 V rms
for 1 minute for
HCNW22XX) per UL1577
CSA Approved
VDE 0884 Approved with
V
IORM
= 630 V
peak
(HCPL-
2211/2212 Option 060 only)
and V
IORM
= 1414 V
peak
(HCNW22XX only)
鈥?MIL-STD-1772 Version
Available
(HCPL-52XX/62XX)
Description
The HCPL-22XX, HCPL-02XX,
and HCNW22XX are optically-
coupled logic gates. The
HCPL-22XX, and HCPL-02XX
contain a GaAsP LED while the
HCNW22XX contains an AlGaAs
LED. The detectors have totem
pole output stages and optical
receiver input stages with built-in
Schmitt triggers to provide logic-
compatible waveforms, eliminat-
ing the need for additional
waveshaping.
A superior internal shield on the
HCPL-2211/12, HCPL-0211,
Applications
鈥?Isolation of High Speed
Logic Systems
鈥?Computer-Peripheral
Interfaces
鈥?Microprocessor System
Interfaces
鈥?Ground Loop Elimination
鈥?Pulse Transformer
Replacement
鈥?High Speed Line Receiver
鈥?Power Control Systems
Functional Diagram
HCPL-2201/11
HCPL-0201/11
HCNW2201/11
NC 1
ANODE 2
CATHODE 3
NC 4
8 V
CC
7 V
O
6 NC
5 GND
NC 1
ANODE 2
CATHODE 3
NC 4
HCPL-2202/12
8 V
CC
7 NC
6 V
O
5 GND
SHIELD
HCPL-2231/32
SHIELD
ANODE 1 1
CATHODE 1 2
CATHODE 2 3
ANODE 2 4
8 V
CC
7 V
O1
6 V
O2
5 GND
TRUTH TABLE
(POSITIVE LOGIC)
LED
V
O
ON
OFF
HIGH
LOW
SHIELD
A 0.1
碌F
bypass capacitor must be connected between pins 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component
to prevent damage and/or degradation which may be induced by ESD.

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