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HCC4034B Datasheet

  • HCC4034B

  • INPUT/OUTPUT BUS REGISTER 8-STAGE STATIC BIDIRECTIONAL PARAL...

  • 16頁(yè)

  • STMICROELECTRONICS   STMICROELECTRONICS

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HCC/HCF4034B
8-STAGE STATIC BIDIRECTIONAL PARALLEL/SERIAL
INPUT/OUTPUT BUS REGISTER
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BIDIRECTIONAL PARALLEL DATA INPUT
PARALLEL OR SERIAL INPUTS/PARALLEL
OUTPUTS
ASYNCHRONOUS OR SYNCHRONOUS PAR-
ALLEL DATA LOADING
PARALLEL DATA-INPUT ENABLE ON 鈥滱鈥?/div>
DATA LINES (3-state output)
DATA RECIRCULATION FOR REGISTER EX-
PANSION
MULTIPACKAGE REGISTER EXPANSION
FULLY STATIC OPERATIONAL DC-TO-5MHz
(typ.) AT V
DD
= 10V
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
5V, 10V, AND 15V PARAMETRIC RATINGS
INPUT CURRENT OF 100nA AT 18V AND 25擄C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N擄 13A, 鈥漇TANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF 鈥滲鈥?/div>
SERIES CMOS DEVICES鈥?/div>
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
M1
(Micro Package)
ORDER CODES :
HCC4034BF
HCF4034BEY
HCF4034BM1
PIN CONNECTIONS
DESCRIPTION
The
HCC4034B
(extended temperature range) and
HCF4034B
(intermediate temperature range) are
monolithic integrated circuits, available in 24-lead
dual in-line plastic or ceramic package and plastic
micro package. The
HCC/HCF4034B
is a static
eight-stage parallel-or serial-input parallel-output
register. It can be used to : 1) bidirectionally transfer
parallel information between two buses ; 2) convert
serial data to parallel form and direct the parallel
data to either of twobuses ; 3) store (recirculate) par-
allel data, or 4) accept parallel data from either of two
buses and convert that data to serial form. Inputs
that control the operations include a single-phase
CLOCK (CL), A DATA ENABLE (AE), ASYN-
CHRONOUS/SYNCHRONOUS (A/S), A-BUS-TO-
B-BUS/B-BUS-TO-A-BUS (A/B), and PARALLEL/
SERIAL (P/S). Data inputs include 16 bidirectional
parallel data lines of which the eight A data lines are
inputs (3-state outputs) and the B data lines are out-
puts (inputs) depending on the signal level on the
A/B input. In addition, an input for SERIAL DATA is
also provided. All register stages are D-type master-
slave flip-flops with separate master and slave clock
June 1989
1/16

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