CD54HC373, CD74HC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS452A 鈥?FEBRUARY 2001 鈥?REVISED APRIL 2003
D
D
D
D
D
2-V to 6-V V
CC
Operation
Wide Operating Temperature Range of
鈥?5擄C to 125擄C
Balanced Propagation Delays and
Transition Times
Standard Outputs Drive up to 15 LS-TTL
Loads
Significant Power Reduction Compared to
LS-TTL Logic ICs
CD54HC373 . . . F PACKAGE
CD74HC373 . . . E OR M PACKAGE
(TOP VIEW)
description/ordering information
The 鈥橦C373 devices are octal transparent D-type
latches designed for 2-V to 6-V V
CC
operation.
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs
are latched at the logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE鈥?/div>
PDIP 鈥?E
鈥?5擄C to 125擄C
55擄C
SOIC 鈥?M
CDIP 鈥?F
Tube
Tube
Tape and reel
Tube
ORDERABLE
PART NUMBER
CD74HC373E
CD74HC373M
CD74HC373M96
CD54HC373F3A
TOP-SIDE
MARKING
CD74HC373E
HC373M
CD54HC373F3A
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
錚?/div>
2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
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