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HB54A2568KN Datasheet

  • HB54A2568KN

  • 256MB DDR SDRAM S.O.DIMM

  • 16頁

  • ELPIDA

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PRELIMINARY DATA SHEET
256MB DDR SDRAM S.O.DIMM
HB54A2568KN-A75B/B75B/10B
(32M words
脳
64 bits, 2 Banks)
Description
The HB54A2568KN is Double Data Rate (DDR)
SDRAM Module, mounted 256M bits DDR SDRAM
(HM5425161BTT) sealed in TSOP package, and 1
piece of serial EEPROM (2k bits EEPROM) for
Presence Detect (PD).
The HB54A2568KN is
organized as 16M
脳
64
脳
2 bank mounted 8 pieces of
256M bits DDR SDRAM. Read and write operations
are performed at the cross points of the CK and the
/CK. This high-speed data transfer is realized by the 2
bits prefetch-pipelined architecture. Data strobe (DQS)
both for read and write are available for high speed and
reliable data bus design. By setting extended mode
register, the on-chip Delay Locked Loop (DLL) can be
set enable or disable. An outline of the products is
200-pin socket type package (dual lead out).
Therefore, it makes high density mounting possible
without surface mount technology. It provides common
data inputs and outputs. Decoupling capacitors are
mounted beside each TSOP on the module board.
Features
鈥?/div>
200-pin socket type package (dual lead out)
錚?/div>
Outline: 67.6mm (Length)
脳
31.75mm (Height)
脳
3.80mm (Thickness)
錚?/div>
Lead pitch: 0.6mm
鈥?/div>
2.5V power supply (VCC)
鈥?/div>
SSTL-2 interface for all inputs and outputs
鈥?/div>
Clock frequency: 133 MHz (max) (-A75B/B75B)
: 100 MHz (max) (-10B)
鈥?/div>
Data inputs, outputs and DM are synchronized with
DQS
鈥?/div>
4 banks can operate simultaneously and
independently (Component)
鈥?/div>
Burst read/write operation
鈥?/div>
Programmable burst length: 2, 4, 8
錚?/div>
Burst read stop capability
鈥?/div>
Programmable burst sequence
錚?/div>
Sequential
錚?/div>
Interleave
鈥?/div>
Start addressing capability
錚?/div>
Even and Odd
鈥?/div>
Programmable /CAS latency (CL): 2, 2.5
鈥?/div>
8192 refresh cycles: 7.8碌s (8192row /64ms)
鈥?/div>
2 variations of refresh
錚?/div>
Auto refresh
錚?/div>
Self refresh
Document No. E0148H20 (Ver. 2.0)
Date Published April 2002 (K) Japan
URL: http://www.elpida.com
錚〦lpida
Memory, Inc. 2001-2002
錚〩itachi,
Ltd. 2001
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.

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