廬
HA-5320
Data Sheet
August 24, 2005
FN2857.7
1 Microsecond Precision Sample and
Hold Amplifier
The HA-5320 was designed for use in precision, high speed
data acquisition systems.
The circuit consists of an input transconductance amplifier
capable of providing large amounts of charging current, a
low leakage analog switch, and an output integrating
amplifier. The analog switch sees virtual ground as its load;
therefore, charge injection on the hold capacitor is constant
over the entire input/output voltage range. The pedestal
voltage resulting from this charge injection can be adjusted
to zero by use of the offset adjust inputs. The device
includes a hold capacitor. However, if improved droop rate is
required at the expense of acquisition time, additional hold
capacitance may be added externally.
This monolithic device is manufactured using the Intersil
Dielectric Isolation Process, minimizing stray capacitance
and eliminating SCRs. This allows higher speed and latch-
free operation. For further information, please see
Application Note AN538.
Features
鈥?Gain, DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 x 10
6
V/V
鈥?Acquisition Time . . . . . . . . . . . . . . . . . . . . . .1.0碌s (0.01%)
鈥?Droop Rate. . . . . . . . . . . . . . . . . . . . . . 0.08碌V/碌s (25擄C)
17碌V/碌s (Full Temperature)
鈥?Aperture Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns
鈥?Hold Step Error (See Glossary) . . . . . . . . . . . . . . . . . 5mV
鈥?Internal Hold Capacitor
鈥?Fully Differential Input
鈥?TTL Compatible
鈥?Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
鈥?Precision Data Acquisition Systems
鈥?Digital to Analog Converter Deglitcher
鈥?Auto Zero Circuits
鈥?Peak Detector
Pinouts
HA-5320
(PDIP, CERDIP)
TOP VIEW
-INPUT 1
+INPUT 2
OFFSET ADJUST 3
OFFSET ADJUST 4
V- 5
SIG. GND 6
OUTPUT 7
14 S/H CONTROL
13 SUPPLY GND
12 NC
11 C
EXT
10 NC
9 V+
INTEGRATOR
8 BANDWIDTH
Ordering Information
PART
NUMBER
HA1-5320-2
HA1-5320-5
HA3-5320-5
HA9P5320-5
PART
MARKING
HA1-5320-2
HA1-5320-5
HA3-5320-5
HA9P5320-5
TEMP.
RANGE
(擄C)
PACKAGE
PKG.
DWG. #
-55 to 25 14 Ld CERDIP F14.3
0 to 75
0 to 75
0 to 75
0 to 75
14 Ld CERDIP F14.3
14 Ld PDIP
16 Ld SOIC
16 Ld SOIC
(Pb-free)
E14.3
M16.3
M16.3
HA9P5320-5Z HA9P5320-5Z
(Note)
HA-5320
(SOIC)
TOP VIEW
-INPUT 1
+INPUT 2
OFFSET ADJUST 3
OFFSET ADJUST 4
V- 5
SIG. GND 6
OUTPUT 7
NC 8
16 S/H CONTROL
15 SUPPLY GND
14 NC
13 C
EXT
12 NC
11 V+
INTEGRATOR
10 BANDWIDTH
9 NC
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright 漏 Intersil Americas Inc. 2003, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
INTERSIL
1
2
3
4
5
6
7
8
