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H3101B Datasheet

  • H3101B

  • Gilbert Cell UHF Transistor Array

  • 12頁

  • INTERSIL   INTERSIL

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廬
HFA3101
Data Sheet
September 2004
FN3663.5
Gilbert Cell UHF Transistor Array
The HFA3101 is an all NPN transistor array configured as a
Multiplier Cell. Based on Intersil鈥檚 bonded wafer UHF-1 SOI
process, this array achieves very high f
T
(10GHz) while
maintaining excellent h
FE
and V
BE
matching characteristics
that have been maximized through careful attention to circuit
design and layout, making this product ideal for
communication circuits. For use in mixer applications, the
cell provides high gain and good cancellation of 2nd order
distortion terms.
Features
鈥?/div>
Pb-free Available as an Option
鈥?High Gain Bandwidth Product (f
T
) . . . . . . . . . . . . . 10GHz
鈥?High Power Gain Bandwidth Product . . . . . . . . . . . . 5GHz
鈥?Current Gain (h
FE
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
鈥?Low Noise Figure (Transistor) . . . . . . . . . . . . . . . . . 3.5dB
鈥?Excellent h
FE
and V
BE
Matching
鈥?Low Collector Leakage Current . . . . . . . . . . . . . . <0.01nA
鈥?Pin to Pin Compatible to UPA101
Ordering Information
PART NUMBER
(BRAND)
HFA3101B
(H3101B)
HFA3101BZ
(H3101B) (Note)
HFA3101B96
(H3101B)
HFA3101BZ96
(H3101B) (Note)
TEMP.
RANGE (擄C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
PACKAGE
8 Ld SOIC
8 Ld SOIC
(Pb-free)
8 Ld SOIC Tape
and Reel
PKG.
DWG. #
M8.15
M8.15
M8.15
Applications
鈥?Balanced Mixers
鈥?Multipliers
鈥?Demodulators/Modulators
鈥?Automatic Gain Control Circuits
鈥?Phase Detectors
鈥?Fiber Optic Signal Processing
鈥?Wireless Communication Systems
鈥?Wide Band Amplification Stages
鈥?Radio and Satellite Communications
鈥?High Performance Instrumentation
8 Ld SOIC Tape
M8.15
and Reel (Pb-free)
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020C.
Pinout
HFA3101
(SOIC)
TOP VIEW
8
7
6
Q
6
3
4
5
Q
1
Q
2
Q
5
1
2
Q
3
Q
4
NOTE: Q
5
and Q
6
- 2 Paralleled 3碌m x 50碌m Transistors
Q
1
, Q
2
, Q
3
, Q
4
- Single 3碌m x 50碌m Transistors
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright 漏 Intersil Americas Inc. 1998, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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