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GS7025-CQM Datasheet

  • GS7025-CQM

  • Serial Digital Receiver

  • 13頁

  • ETC

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PRO-LINX
鈩?/div>
GS7025
Serial Digital Receiver
PRELIMINARY DATA SHEET
FEATURES
鈥?SMPTE 259M-C compliant (270Mb/s)
鈥?automatic cable equalization (typically greater than
350m of high quality cable)
鈥?serial data outputs muted and serial clock remains
active when input data is lost
鈥?operation independent of SAV/EAV sync signals
鈥?signal strength indicator output
鈥?carrier detect with programmable threshold level
鈥?power savings mode (output serial clock disable)
鈥?large IJT, typically 0.56UI beyond loop bandwidth
鈥?robust lock detect
APPLICATIONS
Cable equalization plus clock and data recovery for all high
speed serial digital interface applications involving SMPTE
259M-C.
DESCRIPTION
The GS7025 provides automatic cable equalization and
high performance clock and data recovery for serial digital
signals. The GS7025 receives either single-ended or
differential serial digital data and outputs differential clock
and retimed data signals at PECL levels (800mV). The on-
board cable equalizer provides up to 35dB of gain at
135MHz which typically results in equalization of greater
than 350m of high quality cable at 270Mb/s.
The GS7025 requires only one external resistor to set the
VCO centre frequency and provides adjustment free
operation.
The GS7025 has dedicated pins to indicate signal
strength, carrier detect, and LOCK. Optional external
resistors allow the carrier detect threshold level to be
customized to the user's requirement. In addition, the
GS7025 provides an 'Output Eye Monitor Test' (OEM_TEST)
for diagnostic testing of signal integrity after equalization,
prior to reslicing. The serial clock outputs can also be
disabled to reduce power. The GS7025 operates from a
single +5 or -5 volt supply.
ORDERING INFORMATION
PART NUMBER
GS7025-CQM
GS7025-CTM
PACKAGE
44 pin MQFP Tray
44 pin MQFP Tape
TEMPERATURE
0擄C to 70擄C
0擄C to 70擄C
GS7025
A/D
DDI
DDI
ANALOG
DIGITAL
MUX
CARRIER DETECT
PHASELOCK
HARMONIC
C
OSC
LOCK
LOGIC
MUTE
SDO
SDI
SDI
+
-
-
VARIABLE
GAIN EQ
STAGE
FREQUENCY
ACQUISITION
PHASE
DETECTOR
SDO
CLK_EN
SCO
SCO
OEM_TEST
EYE
MONITOR
AUTO EQ
CONTROL
CHARGE
PUMP
LF+ LFS LF-
+
-
AGC CAP CD_ADJ
SSI/CD
VCO
CBG R
VCO
BLOCK DIAGRAM
Revision Date: November 2000
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com
www.gennum.com
Document No. 522 - 80 - 00

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