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GMM7738280CTG Datasheet

  • GMM7738280CTG

  • 8Mx72|3.3V|5/6|x 9|FP/EDO DRAM - 64MB Buffered DIMM

  • 13頁

  • ETC

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16Mx64 bits
PC100/PC133 SDRAM Unbuffered DIMM
based on 8Mx8 SDRAM with LVTTL, 4 banks & 4K Refresh
GMM26416233ENTG
Description
The GMM26416233ENTG is a 16M x 64bits
Synchronous Dynamic RAM MODULE
which is assembled 16 pieces of 8M x 8bits
Synchronous DRAMs in 54 pin TSOP II
package and one 2048 bit EEPROM in 8pin
TSSOP package mounted on a 168 pin
printed circuit board with decoupling
capacitors. The GMM26416233ENTG is
optimized for application to the systems which
are required high density and large capacity
such as main memory of the computers and an
image memory systems, and to the others
which are requested compact size.
The GMM26416233ENTG provides common
data inputs and outputs.
GMM26416233ENTG
(Double Side)
Features
* PC133/PC100/PC66 Compatible
-7(143MHz)/-75(133MHz)/-8(125MHz)
-7K(PC100,2-2-2)/-7J(PC100,3-2-2)
* 3.3V +/- 0.3V Power supply
* Maximum Clock frequency
100/125/133/143 MHz
* LVTTL Interface
* Burst read/write operation and burst read/
single write operation capability
* Programmable burst length ;
1, 2, 4, 8, Full page
* Programmable burst sequence
Sequential / Interleave
* Full Page burst length capability
Sequential burst
Burst stop capability
* Programmable CAS Latency ; 2, 3
CKE power down mode
* Input / Output data masking
* 4096 Refresh Cycles / 64ms
* Auto refresh / Self refresh Capability
* Serial Presence Detect with EEPROM
Pin Name
CK0, 1, 2, 3
CKE0,1
S0,1,2,3
RAS
CAS
WE
A0 ~ A11
BA0,1
DQ0 ~ 63
DQMB0 ~ 7
V
CC
V
SS
NC
V
REF
SDA
SCL
SA0 ~ 2
DU
Clock input
Clock Enable
Chip Select
Row Address Strobe
Column Address Strobe
Write Enable
Address input
Bank Address input
Data input / output
Data input / output Mask
Power for internal circuit
Ground for internal circuit
No Connect
Power Supply for Reference
Serial Data input/ output
Serial Clock
Address in EEPROM
Don't Use
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
-1-
responsibility for use of circuits described. No patent licenses are implied.
Rev. 1.1/Apr.01

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