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GM71S65800C(CL) Datasheet

  • GM71S65800C(CL)

  • 8Mx8|3.3V|4K|5/6|FP/EDO DRAM - 64M

  • 9頁

  • ETC

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GM71V65800C
8,388,608 WORDS x 8 BIT
CMOS DYNAMIC RAM
Description
The GM71V65800C is the second generation
dynamic RAM organized 8,388,608 words by 8
bits. The GM71V65800C utilizes 0.35um
CMOS Silicon Gate Process Technology as well
as advanced circuit techniques for wide
operating margins, both internally and to the
system user. System oriented features include
single power supply of 3.3V+/- 0.3V tolerance,
direct interfacing capability with high
performance logic families such as Schottky
TTL.
The GM71V65800C offers Fast Page Mode as
a high speed access mode.
Pin Configuration
32 SOJ / TSOP II
V
CC
I/O0
I/O1
I/O2
I/O3
NC
V
CC
WE
RAS
A0
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
SS
I/O7
I/O6
I/O5
I/O4
V
SS
CAS
OE
NC
A11
A10
Features
鈥?8,388,604 Words x 8 Bit
鈥?Fast Page Mode Capability
鈥?Fast Access Time & Cycle Time
(Unit: ns)
A2
A3
A4
A5
V
CC
A9
A8
A7
A6
V
SS
t
RAC
GM71V65800C-5
GM71V65800C-6
GM71V65800C-7
50
60
70
t
AA
25
30
35
t
CAC
13
15
18
t
RC
90
110
130
t
PC
35
40
45
(Top View)
鈥?Low Power
- Active : 522 mW / 450 mW / 360 mW (MAX)
- Standby : 3.6 mW ( CMOS level :MAX )
鈥?RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
鈥?LVTTL
鈥?4096 Refresh Cycles/64 ms
鈥?Single Power Supply of 3.3V+/- 0.3V
with a built-in VBB generator
Rev 0.1 / Apr鈥?1
* This Data Sheet is subject to change without notice.

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