7m鈩?/div>
I
D
75A
N-Channel Enhancement-Mode MOSFET
CH
EN ET
T
REN
F
G
TO-252 (DPAK)
廬
0.265 (6.73)
0.255 (6.48)
0.214 (5.44)
0.206 (5.23)
0.094 (2.39)
0.087 (2.21)
0.023 (0.58)
0.018 (0.46)
0.050 (1.27)
0.035 (0.89)
D
G
S
0.190
(4.826)
D
0.170 (4.32) min.
0.245 (6.22)
0.235 (5.97)
0.410 (10.41)
0.380 (9.65)
0.197 (5.00)
0.177 (4.49)
0.165
(4.191)
G
S
0.060 (1.52)
0.045 (1.14)
0.100
(2.54)
0.035 (0.89)
0.028 (0.71)
0.204 (5.18)
0.156 (3.96)
0.118
(3.0)
0.040 (1.02)
0.025 (0.64)
0.023 (0.58)
0.018 (0.46)
0.045 (1.14)
0.035 (0.89)
0.020 (0.51)
min.
0.009 (0.23)
0.001 (0.03)
Dimensions in inches
and (millimeters)
0.243
(6.172)
0.063
(1.6)
Mounting Pad Layout
Mechanical Data
Case:
JEDEC TO-252 molded plastic body
Terminals:
Solder plated, solderable per
MIL-STD-750, Method 2026
High temperature soldering guaranteed:
250擄C/10 seconds at terminals
Weight:
0.011oz., 0.4g
Features
鈥?Advanced Trench Process Technology
鈥?High Density Cell Design for Ultra Low On-Resistance
鈥?Specially Designed for Low Voltage DC/DC Converters
and motor drives
鈥?Fast Switching for High Efficiency
Maximum Ratings and Thermal Characteristics
(T
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
(3)
T
J
= 150擄C
Pulsed Drain Current
(1)
Power Dissipation
T
J
= 150擄C
T
C
= 25擄C
T
C
= 100擄C
T
A
= 25擄C
(2)
T
C
= 25擄C
T
C
= 100擄C
Symbol
V
DS
V
GS
I
D
I
DM
P
D
T
J
, T
stg
R
胃JC
R
胃JA
C
= 25擄C unless otherwise noted)
Limit
30
鹵
20
Unit
V
75
47
180
62.5
25.0
2.5
鈥?5 to 150
2.0
50
A
W
擄C
擄C/W
擄C/W
Operating Junction and Storage Temperature Range
Junction-to-Case Thermal Resistance
Junction-to-Ambient Thermal Resistance
(2)
Notes:
(1) Pulse width limited by maximum junction temperature
(2) Surface mounted on a 1-in
2
2oz. Cu PCB (FR-4 material)
(3) Maximum DC current limited by the package
Document Number 74591
8-Jan-02
www.vishay.com
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