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GF2M303 Datasheet

  • GF2M303

  • TRANSISTOR | MOSFET | MATCHED PAIR | P-CHANNEL | 20V V(BR)DS...

  • 4頁(yè)

  • ETC

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GF2M303
New Product
Vishay Semiconductor
Dual P-Channel Logic Level
Enhancement-Mode MOSFET
SOT-23-6L
0.122 (3.10)
0.114 (2.90)
V
DS
鈥?0V
R
DS(ON)
0.135鈩?/div>
I
D
鈥?.3A
Top View
0.118 (3.00)
0.106 (2.70)
0.067 (1.70)
0.059 (1.50)
Pin Configuration (Top View)
0.020 (0.50)
0.010 (0.25)
0.037 (0.95)
0.075 (1.90)
Dimensions in inches
and (millimeters)
ON
ILLI CH
0 M
REN GY
20
LL
T
LO
C
E CHNO ET
T
E EN
F
Mounting Pad Layout
6
5
4
廬
1
2
3
G
S
G
G
0.028 (0.7)
0.039
(1.07)
0.004 (0.10)
0.0005 (0.013)
0.039 (1.00)
0.036 (0.90)
0.008 (0.20)
0.004 (0.10)
0.094 (2.4)
10擄 Typical
0.037 (0.95)
Ref.
0.074 (1.9)
Ref.
Mechanical Data
Case:
SOT-23-6L package
Terminals:
Leads solderable per MIL-STD-750,
Method 2026
Marking Code:
M3
Features
鈥?Advanced trench process technology
鈥?High density cell design for ultra low on-resistance
鈥?Popular SOT-23-6L package with copper lead-frame for
superior thermal and electrical capabilities
鈥?Compact and low profile
鈥?鈥?.8V rated
Maximum Ratings and Thermal Characteristics
(T
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
(2)
T
J
= 150擄C
Pulsed Drain Current
(1)
Maximum Power Dissipation
(2)
T
A
= 25擄C
T
A
= 70擄C
T
A
= 25擄C
T
A
= 70擄C
Symbol
V
DS
V
GS
I
D
I
DM
P
D
T
J
, T
stg
R
胃JA
A
= 25擄C unless otherwise noted)
Limit
鈥?0
Unit
V
鹵
8
鈥?2.3
鈥?1.8
鈥?
1.15
0.73
鈥?5 to 150
110
A
W
擄C
擄C/W
Operating Junction and Storage Temperature Range
Junction-to-Ambient Thermal Resistance
(2)
Note:
(1) Pulse width limited by maximum junction temperature.
(2) Surface mounted on a 1in
2
2oz. Cu PCB (FR-4 material)
Document Number 74517
5-Dec-01
www.vishay.com
1

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