an Intel company
2.5 Gbit/s
Clock and Data
Recovery
GD16547
General Description
The GD16547 is a high performance
monolithic integrated
Clock and Data Re-
covery
(CDR) device applicable for opti-
cal communication systems including:
u
SDH STM-16
u
SONET OC-48
The CDR contains all circuits needed for
reliable acquisition and lock of the VCO
phase to the incoming data-stream.
The electrical input sensitivity is better
than 8 mV (BER <10
-10
). Optical re-
ceivers with sensitivity better than
-34 dBm have been obtained without op-
tical pre-amplifiers.
The device meets all ITU-T jitter require-
ments when used with the recommended
loop filter (jitter tolerance, -transfer and
-generation).
The 2.5 GHz output clock is maintained
within 500 ppm tolerance even in ab-
sence of data.
The GD16547 is available in a 48 lead
7 脳 7 mm TQFP power enhanced plastic
package.
Features
l
Clock and Data Recovery for
2.488 Gbit/s.
SDH STM-16, SONET OC-48
compatible.
Differential Data inputs with 8 mV
sensitivity.
Differential ECL Data and Clock
outputs.
Acquisition time: < 500
ms.
Few external passive components
needed.
50
W
Loop-through data inputs for
higher sensitivity.
Single supply operation: -5 V.
Power dissipation: less than 1 W.
Available in a 48 lead 7 脳 7 mm
TQFP plastic package
l
l
l
l
l
l
l
DIREFN
DIN
DI
DIREF
Limiter
D
l
Bang
Bang
Phase
Detector
CK
CKO
CKON
DO
DON
l
DO
U
D
MUX
REFCK
REFCKN
R
V
Phase
Frequency
Detector
U
D
RESET
TCK
SELTCK
Applications
l
Charge
Pump
VDD
VCO
VEE
VDDA
VDDL
SEL1
SEL2
Lock
Detect
Clock and Data Recovery for optical
communication systems including:
鈥?SDH STM-16
鈥?SONET OC-48
LOCK
PCTL
VCTL
Data Sheet Rev.: 12