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FW82371 Datasheet

  • FW82371

  • PCI-TO-ISA / IDE XCELERATOR PIIX4

  • 1020.12KB

  • 284頁

  • INTEL   INTEL

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82371AB PCI-TO-ISA / IDE
XCELERATOR (PIIX4)
Supported Kits for both Pentium and
廬
Pentium II Microprocessors
錚?/div>
82430TX ISA Kit
錚?/div>
82440LX ISA/DP Kit
Multifunction PCI to ISA Bridge
錚?/div>
Supports PCI at 30 MHz and 33 MHz
錚?/div>
Supports PCI Rev 2.1 Specification
錚?/div>
Supports Full ISA or Extended I/O
(EIO) Bus
錚?/div>
Supports Full Positive Decode or
Subtractive Decode of PCI
錚?/div>
Supports ISA and EIO at 1/4 of PCI
Frequency
Supports both Mobile and Desktop
Deep Green Environments
錚?/div>
3.3V Operation with 5V Tolerant
Buffers
錚?/div>
Ultra-low Power for Mobile
Environments Support
錚?/div>
Power-On Suspend, Suspend to
RAM, Suspend to Disk, and Soft-
OFF System States
錚?/div>
All Registers Readable and
Restorable for Proper Resume
from 0.V Suspend
Power Management Logic
錚?/div>
Global and Local Device
Management
錚?/div>
Suspend and Resume Logic
錚?/div>
Supports Thermal Alarm
錚?/div>
Support for External
Microcontroller
錚?/div>
Full Support for Advanced
Configuration and Power Interface
(ACPI) Revision 1.0 Specification
and OS Directed Power
Management
Integrated IDE Controller
錚?/div>
Independent Timing of up to
4 Drives
錚?/div>
PIO Mode 4 and Bus Master IDE
Transfers up to 14 Mbytes/sec
錚?/div>
Supports 鈥淯ltra DMA/33鈥?/div>
Synchronous DMA Mode Transfers
up to 33 Mbytes/sec
漏 INTEL CORPORATION 1997
April 1997
廬
錚?/div>
Integrated 16 x 32-bit Buffer for IDE
PCI Burst Transfers
錚?/div>
Supports Glue-less 鈥淪wap-Bay鈥?/div>
Option with Full Electrical Isolation
Enhanced DMA Controller
錚?/div>
Two 82C37 DMA Controllers
錚?/div>
Supports PCI DMA with 3 PC/PCI
Channels and Distributed DMA
Protocols (Simultaneously)
錚?/div>
Fast Type-F DMA for Reduced PCI
Bus Usage
Interrupt Controller Based on Two
82C59
錚?/div>
15 Interrupt Support
錚?/div>
Independently Programmable for
Edge/Level Sensitivity
錚?/div>
Supports Optional I/O APIC
錚?/div>
Serial Interrupt Input
Timers Based on 82C54
錚?/div>
System Timer, Refresh Request,
Speaker Tone Output
USB
錚?/div>
Two USB 1.0 Ports for Serial
Transfers at 12 or 1.5 Mbit/sec
錚?/div>
Supports Legacy Keyboard and
Mouse Software with USB-based
Keyboard and Mouse
錚?/div>
Supports UHCI Design Guide
SMBus
錚?/div>
Host Interface Allows CPU to
Communicate Via SMBus
錚?/div>
Slave Interface Allows External
SMBus Master to Control Resume
Events
Real-Time Clock
錚?/div>
256-byte Battery-Back CMOS SRAM
錚?/div>
Includes Date Alarm
錚?/div>
Two 8-byte Lockout Ranges
Microsoft Win95* Compliant
324 mBGA Package
Order Number: 290562-001
4/9/97 2:23 PM PIIX4aDS
INTEL CONFIDENTIAL
(until publication date)

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